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[0/5] arm64: dts: ti: k3-am62a/p: Add ddr-pmctrl, canuart-wake

Message ID 20250122-topic-am62-dt-syscon-v6-13-v1-0-515d56edc35e@baylibre.com (mailing list archive)
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Series arm64: dts: ti: k3-am62a/p: Add ddr-pmctrl, canuart-wake | expand

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Markus Schneider-Pargmann Jan. 22, 2025, 10:24 a.m. UTC 
Hi,

Within the wkup-conf register range there are two register ranges that
are controlling specific other parts of the SoC. ddr-pmctrl is one
register that control the DDR power management. canuart-wake are
multiple registers that control the wakeup functionality of the CANUART
block.

The series first adds the dt-bindings to syscon and afterwards adds the
nodes to the wakeup domains of the am62a/p devicetrees.

First patch is a fixup I noticed missing.

Best
Markus

Signed-off-by: Markus Schneider-Pargmann <msp@baylibre.com>
---
Markus Schneider-Pargmann (5):
      dt-bindings: mfd: syscon: Add ti,j784s4-acspcie-proxy-ctrl to second list
      dt-bindings: mfd: syscon: Add ti,am62-ddr-pmctrl
      dt-bindings: mfd: syscon: Add ti,am62-canuart-wake compatible
      arm64: dts: ti: k3-am62a-wakeup: Add ddr-pmctrl, canuart-wake
      arm64: dts: ti: k3-am62p-j722s-common-wakeup: Add ddr-pmctrl, canuart-wake

 Documentation/devicetree/bindings/mfd/syscon.yaml        |  5 +++++
 arch/arm64/boot/dts/ti/k3-am62a-wakeup.dtsi              | 10 ++++++++++
 arch/arm64/boot/dts/ti/k3-am62p-j722s-common-wakeup.dtsi | 10 ++++++++++
 3 files changed, 25 insertions(+)
---
base-commit: 40384c840ea1944d7c5a392e8975ed088ecf0b37
change-id: 20250121-topic-am62-dt-syscon-v6-13-6fdedf036d64

Best regards,