[v2,0/2] soc cache: Add support for HiSilicon L3 cache

Message

Yushan Wang Jan. 22, 2025, 6:58 a.m. UTC

This series adds support for HiSilicon SoC cache lockdown and cache
maintenance operations.

Cache lockdown feature prevents cache entries from being evicted from L3
cache for better performance.  It can be enabled by calling mmap
function to the file (`/dev/hisi_soc_cache_mgmt`).  This feature is
implemented in the driver hisi_soc_l3c.

L3 cache and L3 cache PMU share the same memory resource, which makes
one fails to probe while another is on board.  Since both devices
rely on distinct information exported by ACPI, their probing functions
should be unrelated.  Workaround the resource conflict check by
replacing devm_ioremap_resource() to devm_ioremap() instead.

Changes in v2:
  - Save unnecessary iterations when performing cache lock. (Christophe)
  - Other minor style changes. (Christophe)
  - Link to v1: https://lore.kernel.org/all/[e-mail]

Jie Wang (1):
  soc cache: Add framework driver for HiSilicon SoC cache

Yushan Wang (1):
  soc cache: L3 cache lockdown support for HiSilicon SoC

 drivers/soc/hisilicon/Kconfig                 |  22 +
 drivers/soc/hisilicon/Makefile                |   2 +
 .../soc/hisilicon/hisi_soc_cache_framework.c  | 534 ++++++++++++++++++
 .../soc/hisilicon/hisi_soc_cache_framework.h  |  77 +++
 drivers/soc/hisilicon/hisi_soc_l3c.c          | 527 +++++++++++++++++
 5 files changed, 1162 insertions(+)
 create mode 100644 drivers/soc/hisilicon/hisi_soc_cache_framework.c
 create mode 100644 drivers/soc/hisilicon/hisi_soc_cache_framework.h
 create mode 100644 drivers/soc/hisilicon/hisi_soc_l3c.c