Message ID | 20250313-qcs615-v5-mm-cc-v6-0-ebf4b9a5e916@quicinc.com (mailing list archive) |
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Thu, 13 Mar 2025 06:59:53 GMT Received: from hu-tdas-hyd.qualcomm.com (10.80.80.8) by nalasex01a.na.qualcomm.com (10.47.209.196) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1544.9; Wed, 12 Mar 2025 23:59:47 -0700 From: Taniya Das <quic_tdas@quicinc.com> Subject: [PATCH v6 00/10] Add support for videocc, camcc, dispcc and gpucc on Qualcomm QCS615 platform Date: Thu, 13 Mar 2025 12:29:37 +0530 Message-ID: <20250313-qcs615-v5-mm-cc-v6-0-ebf4b9a5e916@quicinc.com> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 7bit X-B4-Tracking: v=1; b=H4sIAFmC0mcC/3WNwQ7CIBBEf6XZs2taIoR68j+aHtoF7B4KFpRoG v5d7N3bvEnmzQ7JRrYJrs0O0WZOHHwFdWqAlsnfLbKpDKIVshWiw42S6iRmieuKRKjn/jI5mnR PEurqEa3j92EcxsoLp2eIn+Mgy1/731VDi7MyvTFOOKHNbXsxsaczhRXGUsoXAVXnvbAAAAA= X-Change-ID: 20250221-qcs615-v5-mm-cc-8b94afca89c5 To: Bjorn Andersson <andersson@kernel.org>, Michael Turquette <mturquette@baylibre.com>, Stephen Boyd <sboyd@kernel.org>, Rob Herring <robh@kernel.org>, Krzysztof Kozlowski <krzk+dt@kernel.org>, Conor Dooley <conor+dt@kernel.org>, Catalin Marinas <catalin.marinas@arm.com>, Will Deacon <will@kernel.org> CC: Ajit Pandey <quic_ajipan@quicinc.com>, Imran Shaik <quic_imrashai@quicinc.com>, Jagadeesh Kona <quic_jkona@quicinc.com>, <linux-arm-msm@vger.kernel.org>, <linux-clk@vger.kernel.org>, <linux-kernel@vger.kernel.org>, <devicetree@vger.kernel.org>, <linux-arm-kernel@lists.infradead.org>, Taniya Das <quic_tdas@quicinc.com>, Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>, Bryan O'Donoghue <bryan.odonoghue@linaro.org>, Dmitry Baryshkov <dmitry.baryshkov@linaro.org> X-Mailer: b4 0.15-dev-aa3f6 X-Originating-IP: [10.80.80.8] X-ClientProxiedBy: nasanex01a.na.qualcomm.com (10.52.223.231) To nalasex01a.na.qualcomm.com (10.47.209.196) X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Authority-Analysis: v=2.4 cv=D6NHKuRj c=1 sm=1 tr=0 ts=67d2826a cx=c_pps a=ouPCqIW2jiPt+lZRy3xVPw==:117 a=ouPCqIW2jiPt+lZRy3xVPw==:17 a=GEpy-HfZoHoA:10 a=IkcTkHD0fZMA:10 a=Vs1iUdzkB0EA:10 a=VwQbUJbxAAAA:8 a=COk6AnOGAAAA:8 a=pGLkceISAAAA:8 a=C8cLAskXDhL-uTxbcdAA:9 a=QEXdDO2ut3YA:10 a=TjNXssC_j7lpFel5tvFf:22 X-Proofpoint-GUID: fPOEEW0si2gk5Z6nIwwnbpMVrXWYLzFr X-Proofpoint-ORIG-GUID: fPOEEW0si2gk5Z6nIwwnbpMVrXWYLzFr X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1093,Hydra:6.0.680,FMLib:17.12.68.34 definitions=2025-03-13_03,2025-03-11_02,2024-11-22_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 bulkscore=0 suspectscore=0 priorityscore=1501 mlxscore=0 spamscore=0 lowpriorityscore=0 phishscore=0 adultscore=0 malwarescore=0 mlxlogscore=999 clxscore=1015 impostorscore=0 classifier=spam authscore=0 authtc=n/a authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.19.0-2502280000 definitions=main-2503130054 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20250313_000001_831026_363C7A58 X-CRM114-Status: GOOD ( 12.15 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: <linux-arm-kernel.lists.infradead.org> List-Unsubscribe: <http://lists.infradead.org/mailman/options/linux-arm-kernel>, <mailto:linux-arm-kernel-request@lists.infradead.org?subject=unsubscribe> List-Archive: <http://lists.infradead.org/pipermail/linux-arm-kernel/> List-Post: <mailto:linux-arm-kernel@lists.infradead.org> List-Help: <mailto:linux-arm-kernel-request@lists.infradead.org?subject=help> List-Subscribe: <http://lists.infradead.org/mailman/listinfo/linux-arm-kernel>, <mailto:linux-arm-kernel-request@lists.infradead.org?subject=subscribe> Sender: "linux-arm-kernel" <linux-arm-kernel-bounces@lists.infradead.org> Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org |
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Add support for videocc, camcc, dispcc and gpucc on Qualcomm QCS615 platform
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Add support for multimedia clock controllers on Qualcomm QCS615 platform. Update the defconfig to enable these clock controllers. Global clock controller support https://lore.kernel.org/all/20241022-qcs615-clock-driver-v4-0-3d716ad0d987@quicinc.com/ Changes in v6: - Remove wrongly RB-By tags which got introduced in v4 and was carried to v5 as well. - Adding the reference where the tags were added and dropped. -[01/10] clk: qcom: clk-alpha-pll: Add support for dynamic update for slewing PLLs - RB-By from Imran (v2) -[02/10] dt-bindings: clock: Add Qualcomm QCS615 Camera clock controller - RB-By from Krzysztof (v2), drop wrong RB-By from Dmitry (v5) -[03/10] clk: qcom: camcc-qcs615: Add QCS615 camera clock controller driver - R-By from Bryan (v2) -[04/10] dt-bindings: clock: Add Qualcomm QCS615 Display clock controller - Drop wrong RB-By from Dmitry (v5) -[05/10] clk: qcom: dispcc-qcs615: Add QCS615 display clock controller driver - R-By from Dmitry (v1) -[06/10] dt-bindings: clock: Add Qualcomm QCS615 Graphics clock controller - Drop wrong RB-By from Dmitry(v5) -[07/10] clk: qcom: gpucc-qcs615: Add QCS615 graphics clock controller driver - R-By from Dmitry (v1) -[08/10] dt-bindings: clock: Add Qualcomm QCS615 Video clock controller - Drop wrong RB-By from Dmitry(v5) -[09/10] clk: qcom: videocc-qcs615: Add QCS615 video clock controller driver - R-By from Dmitry and Bryan (v3) -[10/10] arm64: defconfig: Enable QCS615 clock controllers - Drop wrong RB-By from Dmitry (v5) - Link to v5: https://lore.kernel.org/r/20250221-qcs615-v5-mm-cc-v5-0-b6d9ddf2f28d@quicinc.com Changes in v5: - Update ARM64 || COMPILE_TEST in all Kconfig to resolve kismet warnings. - Fix sparse errors in GPUCC. - Link to v4: https://lore.kernel.org/r/20250119-qcs615-mm-v4-clockcontroller-v4-0-5d1bdb5a140c@quicinc.com Changes in v4: - Drop patch Update the support for alpha mode configuration as this patch was picked - https://lore.kernel.org/all/20241021-fix-alpha-mode-config-v1-1-f32c254e02bc@gmail.com/ - Update the bindings to include "qcom,gcc.yaml" [Dmitry] Changes in v3: - update PLL configs to use BIT and GENMASK for vco_val and vco_mask for all CCs [Bryan O'Donoghue] - Link to v2: https://lore.kernel.org/r/20241101-qcs615-mm-clockcontroller-v2-0-d1a4870a4aed@quicinc.com Changes in v2: - cleanups in clk_alpha_pll_slew_update and clk_alpha_pll_slew_enable functions [Christophe] - update PLL configs for "vco_val = 0x0" shift(20) [Bryan O'Donoghue] - update PLL configs to use lower case for L value [Dmitry] - Link parents for IFE/IPE/BPS GDSCs as Titan Top GDSC [Bryan O'Donoghue, Dmitry] - Remove DT_BI_TCXO_AO from camcc-qcs615 [Dmitry] - Remove HW_CTRL_TRIGGER from camcc-qcs615 [Bryan O'Donoghue] - Update platform name for default configuration [Dmitry] - Link to v1: https://lore.kernel.org/r/20241019-qcs615-mm-clockcontroller-v1-0-4cfb96d779ae@quicinc.com Signed-off-by: Taniya Das <quic_tdas@quicinc.com> --- Taniya Das (10): clk: qcom: clk-alpha-pll: Add support for dynamic update for slewing PLLs dt-bindings: clock: Add Qualcomm QCS615 Camera clock controller clk: qcom: camcc-qcs615: Add QCS615 camera clock controller driver dt-bindings: clock: Add Qualcomm QCS615 Display clock controller clk: qcom: dispcc-qcs615: Add QCS615 display clock controller driver dt-bindings: clock: Add Qualcomm QCS615 Graphics clock controller clk: qcom: gpucc-qcs615: Add QCS615 graphics clock controller driver dt-bindings: clock: Add Qualcomm QCS615 Video clock controller clk: qcom: videocc-qcs615: Add QCS615 video clock controller driver arm64: defconfig: Enable QCS615 clock controllers .../bindings/clock/qcom,qcs615-camcc.yaml | 54 + .../bindings/clock/qcom,qcs615-dispcc.yaml | 73 + .../bindings/clock/qcom,qcs615-gpucc.yaml | 66 + .../bindings/clock/qcom,qcs615-videocc.yaml | 64 + arch/arm64/configs/defconfig | 4 + drivers/clk/qcom/Kconfig | 38 + drivers/clk/qcom/Makefile | 4 + drivers/clk/qcom/camcc-qcs615.c | 1591 ++++++++++++++++++++ drivers/clk/qcom/clk-alpha-pll.c | 170 +++ drivers/clk/qcom/clk-alpha-pll.h | 1 + drivers/clk/qcom/dispcc-qcs615.c | 786 ++++++++++ drivers/clk/qcom/gpucc-qcs615.c | 525 +++++++ drivers/clk/qcom/videocc-qcs615.c | 332 ++++ include/dt-bindings/clock/qcom,qcs615-camcc.h | 110 ++ include/dt-bindings/clock/qcom,qcs615-dispcc.h | 52 + include/dt-bindings/clock/qcom,qcs615-gpucc.h | 39 + include/dt-bindings/clock/qcom,qcs615-videocc.h | 30 + 17 files changed, 3939 insertions(+) --- base-commit: 50a0c754714aa3ea0b0e62f3765eb666a1579f24 change-id: 20250221-qcs615-v5-mm-cc-8b94afca89c5 Best regards,