From patchwork Tue Apr 8 19:59:20 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Yabin Cui X-Patchwork-Id: 14043614 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id A3A60C36010 for ; Tue, 8 Apr 2025 20:04:33 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender:List-Subscribe:List-Help :List-Post:List-Archive:List-Unsubscribe:List-Id:Content-Type:Cc:To:From: Subject:Message-ID:Mime-Version:Date:Reply-To:Content-Transfer-Encoding: Content-ID:Content-Description:Resent-Date:Resent-From:Resent-Sender: Resent-To:Resent-Cc:Resent-Message-ID:In-Reply-To:References:List-Owner; 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AJvYcCXB0kkgM750gTYgKePSE0R5tCSas/MPhKlkiAdr/ZBSnsQo+sIE4D16PzpX9vjyiMgYQjhD1LjiI/RVCEk5ofw3@lists.infradead.org X-Gm-Message-State: AOJu0YyIm9x+HQtLOXgjazAF3rAYEDyDWQxcH2FFFYK6iSFfaVbueA45 j5HhtInwb2T7xxUKXVrIlFsLyaaLuPrbZZqx/u0TB3YG2ye48HkT+F5w1MZhAZtllMosxryGlRQ + X-Google-Smtp-Source: AGHT+IHtnt5zN6OyJvv673+ynstNvQUf43BeN6J0WtU8LzaOOlcLNTKLOFI6eZdKvbTOSGjsZBpwHfH0Ns4= X-Received: from oabwd7.prod.google.com ([2002:a05:6871:a587:b0:288:7c1b:bc]) (user=yabinc job=prod-delivery.src-stubby-dispatcher) by 2002:a05:6830:3981:b0:72b:8a8b:e02d with SMTP id 46e09a7af769-72e7097ee43mr304697a34.5.1744142388625; Tue, 08 Apr 2025 12:59:48 -0700 (PDT) Date: Tue, 8 Apr 2025 12:59:20 -0700 Mime-Version: 1.0 X-Mailer: git-send-email 2.49.0.504.g3bcea36a83-goog Message-ID: <20250408195922.770377-1-yabinc@google.com> Subject: [PATCH v3 0/2] coresight: catu: Introduce refcount and spinlock for enabling/disabling From: Yabin Cui To: Suzuki K Poulose , Mike Leach , James Clark , Leo Yan , Jie Gan , Alexander Shishkin Cc: coresight@lists.linaro.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, Yabin Cui X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20250408_125950_307766_C867B558 X-CRM114-Status: GOOD ( 12.14 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Hi Coresight maintainers, When tracing ETM data on multiple CPUs concurrently via the perf interface, the CATU device is shared across different CPU paths. This can lead to race conditions when multiple CPUs attempt to enable or disable the CATU device simultaneously. This patchset is to fix race conditions when enabling/disabling a CATU device. Changes since v2: - In catu_disable(), return 0 when refcnt > 0. - Remove the patch checking enabled mode. - Disable helpers at the places where a coresight device fails to enable. Changes since v1: - Use raw_spinlock_t and guard(). - Add a patch to check enabled mode. - Add a patch to disable helpers when fails to enable a device. Yabin Cui (2): coresight: catu: Introduce refcount and spinlock for enabling/disabling coresight: core: Disable helpers for devices that fail to enable drivers/hwtracing/coresight/coresight-catu.c | 25 +++++++++++++------- drivers/hwtracing/coresight/coresight-catu.h | 1 + drivers/hwtracing/coresight/coresight-core.c | 9 +++++-- 3 files changed, 25 insertions(+), 10 deletions(-)