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[0/2] Fix init order of S3C64xx's clock providers

Message ID BY5PR12MB3699A8D741EF6226B8DB65E4C4B50@BY5PR12MB3699.namprd12.prod.outlook.com (mailing list archive)
Headers show
Series Fix init order of S3C64xx's clock providers | expand

Message

Lihua Yao Sept. 7, 2019, 2:47 a.m. UTC
From: Lihua Yao <ylhuajnu@outlook.com>

Ensure fin_pll is initialized before clock-controller@7e00f000 so
we have correct clock frequency like below:

[    0.000000] S3C6410 clocks: apll = 532000000, mpll = 532000000
[    0.000000]  epll = 24000000, arm_clk = 532000000

Lihua Yao (2):
  ARM: dts: s3c64xx: factor out external fixed clocks
  ARM: dts: s3c64xx: specify dependency of clock providers

 arch/arm/boot/dts/s3c6400.dtsi         |  1 +
 arch/arm/boot/dts/s3c6410-mini6410.dts | 22 ----------------------
 arch/arm/boot/dts/s3c6410-smdk6410.dts | 22 ----------------------
 arch/arm/boot/dts/s3c6410.dtsi         |  1 +
 arch/arm/boot/dts/s3c64xx.dtsi         | 14 ++++++++++++++
 5 files changed, 16 insertions(+), 44 deletions(-)

Comments

Krzysztof Kozlowski Sept. 9, 2019, 6:45 p.m. UTC | #1
On Sat, Sep 07, 2019 at 02:47:48AM +0000, Yao Lihua wrote:
> From: Lihua Yao <ylhuajnu@outlook.com>
> 
> Ensure fin_pll is initialized before clock-controller@7e00f000 so
> we have correct clock frequency like below:
> 
> [    0.000000] S3C6410 clocks: apll = 532000000, mpll = 532000000
> [    0.000000]  epll = 24000000, arm_clk = 532000000

Hi,

Unfortunately your patches missed the samsung-soc mailing list:
https://www.spinics.net/lists/linux-samsung-soc/

Maybe you need to be subscribed?

In general, if the patches are not there, I do not see them under
Patchwork. You miss also review from Samsung folks.

Best regards,
Krzysztof


> 
> Lihua Yao (2):
>   ARM: dts: s3c64xx: factor out external fixed clocks
>   ARM: dts: s3c64xx: specify dependency of clock providers
> 
>  arch/arm/boot/dts/s3c6400.dtsi         |  1 +
>  arch/arm/boot/dts/s3c6410-mini6410.dts | 22 ----------------------
>  arch/arm/boot/dts/s3c6410-smdk6410.dts | 22 ----------------------
>  arch/arm/boot/dts/s3c6410.dtsi         |  1 +
>  arch/arm/boot/dts/s3c64xx.dtsi         | 14 ++++++++++++++
>  5 files changed, 16 insertions(+), 44 deletions(-)
> 
> -- 
> 2.17.1
>
Krzysztof Kozlowski Sept. 10, 2019, 2:34 p.m. UTC | #2
On Tue, 10 Sep 2019 at 14:56, Lihua Yao <ylhuajnu@outlook.com> wrote:
>
> Hi  Krzysztof,
>
> On 10/9/2019 2:45 AM, krzk@kernel.org wrote:
>
> On Sat, Sep 07, 2019 at 02:47:48AM +0000, Yao Lihua wrote:
>
> From: Lihua Yao <ylhuajnu@outlook.com>
>
> Ensure fin_pll is initialized before clock-controller@7e00f000 so
> we have correct clock frequency like below:
>
> [    0.000000] S3C6410 clocks: apll = 532000000, mpll = 532000000
> [    0.000000]  epll = 24000000, arm_clk = 532000000
>
> Hi,
>
> Unfortunately your patches missed the samsung-soc mailing list:
> https://www.spinics.net/lists/linux-samsung-soc/
>
> Maybe you need to be subscribed?
>
> In general, if the patches are not there, I do not see them under
> Patchwork. You miss also review from Samsung folks.
>
> I had tried subscribing mail list but got rejected by vger.kernel.org.
>
>   majordomo@vger.kernel.org
>   vger.kernel.org
>   Remote Server returned '553 5.7.1 Hello [40.92.11.38], for your MAIL FROM address <ylhuajnu@outlook.com> policy analysis reported:   Your address is not liked source for email'
>
> I had used my @163.com email too but got nothing. I couldn't use gmail
> as google's services are blocked from china mainland.
>
> Would you kindly recommend some email servers that vger.kernel.org is
> happy to accept?

Indeed outlook.com seems to be blocked. I do not know what other
services are accepted. There are many China-based developers and
somehow they are able to send to LKML.

Best regards,
Krzysztof