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bh=o9IiNvanpf6vE8Y5GsfQqbwdzxovPBJKNOW11kH1wiY=; b=tufhPs/Qsb7ZNlfrNHcsAnQAT63PBV3QH/0rcDgkgVR2sDelFu6woEeyQ8ZwYg6Q8F FfQpML8iu8mjz90qbzkfMw+A0z/QfsRfvYQ8J54Ap10ZjYAO8SzySw7aGlEpfb6tEWpj ce7k3yHYku6xu+qMJKQDdVRPgykpMGOK3Gu2DnUUyqgsqq0eT04vo9ZXZ0O0byCnGKXt c1ceHacC1ybSCEx5fzU3Jx6VPLO6ccGsMfLseu5B44Er7Bsqh/F+v4bwwgXtIJALzAfx bO30TNnuSd3+ltwgItKgq6KNAosWpsDx29aSbxPBHoxR1DUB48lffmM47zL+tr1e9m2m jKVg== X-Gm-Message-State: AHQUAuZhD1o2XIi9hF+x7Jikqy8T//YPDcIhBvE3yf3ZauHmfCoE6Vlz 4PSHf5cTjIarU9lzXD3fCoc= X-Google-Smtp-Source: AHgI3IYZ/ShhEsA6YZXSHdipPuH9wBXZY/oPKTpENs9EdcPoog/qPMcsYyery5l78vkMzZjGmR6Naw== X-Received: by 2002:a7b:ce84:: with SMTP id q4mr9085611wmj.105.1549876903693; Mon, 11 Feb 2019 01:21:43 -0800 (PST) Received: from ThinkPad.gtu.edu.tr ([193.140.134.118]) by smtp.gmail.com with ESMTPSA id o7sm11388979wmc.44.2019.02.11.01.21.41 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Mon, 11 Feb 2019 01:21:43 -0800 (PST) From: Mesih Kilinc To: devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-clk@vger.kernel.org, linux-sunxi@googlegroups.com Subject: [PATCH 0/7] Timer & SPI support for Allwinner suniv F1C100s Date: Mon, 11 Feb 2019 12:21:06 +0300 Message-Id: X-Mailer: git-send-email 2.7.4 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20190211_012146_056225_63C8C6D3 X-CRM114-Status: GOOD ( 11.71 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Mesih Kilinc , Linus Walleij , Chen-Yu Tsai , Rob Herring , Maxime Ripard , Icenowy Zheng MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Virus-Scanned: ClamAV using ClamSMTP This is followup series for F1C100s initial support patchset. All patches merged except patch 1 ~ 2 which is related to timer. I am resending those since they are already have Acked tags. Our dt-bindings for F1C100s are merged, we can now use them at our device tree source - patch 3. Also this series add spi support and enables spi flash at Lichee-pi Nano in patch 4 ~ 7. This patches are based on Icenowy's work. Thanks! Mesih Kilinc (7): dt-bindings: timer: Add Allwinner suniv timer clocksource: sun4i: add a compatible for suniv ARM: dts: suniv: Add dt-binding headers for F1C100s dt-bindings: spi: Add Support for Allwinner F1C100s ARM: dts: suniv: Add SPI device-tree nodes ARM: dts: suniv: Add pinmux for SPI0 and SPI1 of F1C100s ARM: dts: f1c100s: Activate SPI flash on Lichee Pi Nano .../devicetree/bindings/spi/spi-sun6i.txt | 5 +- .../bindings/timer/allwinner,sun4i-timer.txt | 4 +- arch/arm/boot/dts/suniv-f1c100s-licheepi-nano.dts | 13 ++++++ arch/arm/boot/dts/suniv-f1c100s.dtsi | 53 +++++++++++++++++++--- drivers/clocksource/timer-sun4i.c | 5 +- 5 files changed, 70 insertions(+), 10 deletions(-)