| Message ID | cover.1635993377.git.qinjian@cqplus1.com (mailing list archive) |
|---|---|
| Headers | show |
| Series | Add Sunplus SP7021 SoC Support | expand |
Qin, On Thu, 04 Nov 2021 02:56:57 +0000, Qin Jian <qinjian@cqplus1.com> wrote: > > This patch series add Sunplus SP7021 SoC support. > > Sunplus SP7021 is an ARM Cortex A7 (4 cores) based SoC. It integrates many > peripherals (ex: UART, I2C, SPI, SDIO, eMMC, USB, SD card and etc.) into a > single chip. It is designed for industrial control. > > SP7021 consists of two chips (dies) in a package. One is called C-chip > (computing chip). It is a 4-core ARM Cortex A7 CPU. It adopts high-level > process (22 nm) for high performance computing. The other is called P- > chip (peripheral chip). It has many peripherals and an ARM A926 added > especially for real-time control. P-chip is made for customers. It adopts > low-level process (ex: 0.11 um) to reduce cost. That's the 3rd version of this series since Friday, two of them during the merge window. All you are achieving is to actually *delay* the review process (at this rate, I'll probably wait until v11 before I take another look at it). Documentation/process/submitting-patches.rst states it clearly: <quote> Wait for a minimum of one week before resubmitting </quote> So please leave people the time to actually do a good review job, and take the opportunity to review your own patches before posting them again. Thanks, M.
This patch series add Sunplus SP7021 SoC support. Sunplus SP7021 is an ARM Cortex A7 (4 cores) based SoC. It integrates many peripherals (ex: UART, I2C, SPI, SDIO, eMMC, USB, SD card and etc.) into a single chip. It is designed for industrial control. SP7021 consists of two chips (dies) in a package. One is called C-chip (computing chip). It is a 4-core ARM Cortex A7 CPU. It adopts high-level process (22 nm) for high performance computing. The other is called P- chip (peripheral chip). It has many peripherals and an ARM A926 added especially for real-time control. P-chip is made for customers. It adopts low-level process (ex: 0.11 um) to reduce cost. Refer to (for documentations): https://sunplus-tibbo.atlassian.net/wiki/spaces/doc/overview Refer to (applications): https://tibbo.com/store/plus1.html Refer to (applications): http://www.sinovoip.com.cn/ecp_view.asp?id=586 Changes in v4: - mach-sunplus: add initial support for SP7021 - sp7021_defconfig: add generic SP7021 defconfig - reset-sunplus: remove Q645 support - reset-sunplus.c: refine code based on Philipp's review - clk-sp7021: clock defines add prefix, more clean up Changes in v3: - sp7021-intc: remove primary controller mode due to P-chip running Linux not supported any more. - sp7021-intc.h: removed, not set ext through the DT but sp_intc_set_ext() - sunplus,sp7021-intc.yaml: update descriptions for above changes - irq-sp7021-intc.c: more cleanup based on Marc's review - all driver's Kconfig removed default, it's selected by platform config Changes in v2: - sunplus,sp7021-intc.yaml: add descrption for "#interrupt-cells", interrupts - sunplus,sp7021-intc.yaml: drop "ext0-mask"/"ext1-mask" from DT - sunplus,sp7021-intc.yaml: fix example.dt too long error - irq-sp7021-intc.c: major rewrite - all files with dual license Qin Jian (10): dt-bindings: vendor-prefixes: Add Sunplus dt-bindings: arm: sunplus: Add bindings for Sunplus SP7021 SoC boards dt-bindings: reset: Add bindings for SP7021 reset driver reset: Add Sunplus SP7021 reset driver dt-bindings: clock: Add bindings for SP7021 clock driver clk: Add Sunplus SP7021 clock driver dt-bindings: interrupt-controller: Add bindings for SP7021 interrupt controller irqchip: Add Sunplus SP7021 interrupt controller driver ARM: sunplus: Add initial support for Sunplus SP7021 SoC ARM: sp7021_defconfig: Add Sunplus SP7021 defconfig .../bindings/arm/sunplus,sp7021.yaml | 27 + .../bindings/clock/sunplus,sp7021-clkc.yaml | 38 + .../sunplus,sp7021-intc.yaml | 62 ++ .../bindings/reset/sunplus,reset.yaml | 38 + .../devicetree/bindings/vendor-prefixes.yaml | 2 + MAINTAINERS | 17 + arch/arm/Kconfig | 20 + arch/arm/Makefile | 2 + arch/arm/configs/sp7021_defconfig | 176 +++++ arch/arm/mach-sunplus/Kconfig | 20 + arch/arm/mach-sunplus/Makefile | 9 + arch/arm/mach-sunplus/Makefile.boot | 3 + arch/arm/mach-sunplus/sp7021.c | 16 + drivers/clk/Kconfig | 9 + drivers/clk/Makefile | 1 + drivers/clk/clk-sp7021.c | 725 ++++++++++++++++++ drivers/irqchip/Kconfig | 9 + drivers/irqchip/Makefile | 1 + drivers/irqchip/irq-sp7021-intc.c | 279 +++++++ drivers/reset/Kconfig | 9 + drivers/reset/Makefile | 1 + drivers/reset/reset-sunplus.c | 133 ++++ include/dt-bindings/clock/sp-sp7021.h | 112 +++ include/dt-bindings/reset/sp-sp7021.h | 97 +++ 24 files changed, 1806 insertions(+) create mode 100644 Documentation/devicetree/bindings/arm/sunplus,sp7021.yaml create mode 100644 Documentation/devicetree/bindings/clock/sunplus,sp7021-clkc.yaml create mode 100644 Documentation/devicetree/bindings/interrupt-controller/sunplus,sp7021-intc.yaml create mode 100644 Documentation/devicetree/bindings/reset/sunplus,reset.yaml create mode 100644 arch/arm/configs/sp7021_defconfig create mode 100644 arch/arm/mach-sunplus/Kconfig create mode 100644 arch/arm/mach-sunplus/Makefile create mode 100644 arch/arm/mach-sunplus/Makefile.boot create mode 100644 arch/arm/mach-sunplus/sp7021.c create mode 100644 drivers/clk/clk-sp7021.c create mode 100644 drivers/irqchip/irq-sp7021-intc.c create mode 100644 drivers/reset/reset-sunplus.c create mode 100644 include/dt-bindings/clock/sp-sp7021.h create mode 100644 include/dt-bindings/reset/sp-sp7021.h -- 2.33.1