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Tue, 22 Aug 2023 01:46:02 -0700 From: Nicolin Chen To: , , CC: , , , , , Subject: [PATCH 0/3] iommu/arm-smmu-v3: Reduce latency in __arm_smmu_tlb_inv_range() Date: Tue, 22 Aug 2023 01:45:50 -0700 Message-ID: X-Mailer: git-send-email 2.41.0 MIME-Version: 1.0 X-NV-OnPremToCloud: ExternallySecured X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: CY4PEPF0000EDD6:EE_|DM6PR12MB4562:EE_ X-MS-Office365-Filtering-Correlation-Id: 3c64e0ab-924d-4c25-cbc6-08dba2ec3d4a X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: 4Q4nbTG4yeUOePC4/rm4Qk4xmIMRn+tk8rmNB1lUBlOeSwZc+r5U/bpqNj4/IKDDuyswsOtrvuxMMXqOpuBFaCcrjDgsPfpPxzlP9pzXnSCKHjhYk6gdIeCj0ZvhUvJdJE0PX6FreafnyDMXx9kP0RNkQMoOlLp3U/vj37Q3rReT2XAmsTwCeozrlIHPBy+8wtmGkR0LsJunuBb7Dtfl2Dib6L4sfhL0aj04RwMOb9dqYPWN/Hwa/viRySrIp614H2oEjLTeOhh/8n/jhNAV/i6GuMXKAXdya4RqkUlZjghw5FOlhXndAaEopqdZTZFDUU6tjTjZGPkSq6836nZXDEwIRH7mjzeWKZfd4oLJF/6exztGjw9qq3d0mmCuWO2x7fzMIEmsIbUSgIjCEKgkWH7Kk7hqgC/3/DZPeSNUv5ZcAQ4QAdXl3V5VfnHvAo9hmDs4gLJd5EjCuQzHAiStKvQzCKr/viZEwE0oMFsxemI7TPnsZKTDajkykIMScNiQ+WNdfPCPhYrv0abN8c7xBJAu+olhaTv6uzS0KPm5uEz+0hV1f5KN5WSoZbHHAglMbcpQpnEfhcZHCDk/vWmjWZBgSU87z8n+rvIWhSaKLpn9aM8Cz9z9E+mdOOPr1EaQJFtoLGBlMUu86APqO9HtvkglWzILqWoMoEYD5tlj0jKDt0b5/4vQXtakacoGR3XssM50jj2PNqTgVFXL/UoR8CP9+FNgFXQMg+0skAwikODhpSfcSDheB/cNlGW52Px1hnUtp+eUU7PpAVyIrcAwKA== X-Forefront-Antispam-Report: CIP:216.228.118.232;CTRY:US;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:mail.nvidia.com;PTR:dc7edge1.nvidia.com;CAT:NONE;SFS:(13230031)(4636009)(396003)(136003)(39860400002)(346002)(376002)(1800799009)(186009)(451199024)(82310400011)(46966006)(36840700001)(40470700004)(54906003)(6636002)(70206006)(70586007)(316002)(110136005)(8676002)(8936002)(2616005)(4326008)(7636003)(40460700003)(36756003)(41300700001)(82740400003)(356005)(966005)(478600001)(6666004)(40480700001)(83380400001)(2906002)(86362001)(7696005)(47076005)(36860700001)(336012)(426003)(5660300002)(26005);DIR:OUT;SFP:1101; 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X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org This series is reformatted from the tlb_invalidate_threshold patch: https://lore.kernel.org/linux-iommu/ZN5oojF6vKOKB%2FeI@Asurada-Nvidia/ The discussion in the thread above moved towards the direction of adding an arbitrary max_tlbi_ops (similar to MAX_TLBI_OPS in tlbflush.h file). The changes here aim to reduce the latency in __arm_smmu_tlb_inv_range() due to the large number of TLBI commands on an SMMU without the support of range TLBI commands. The solution is to add a threshold at the number of TLBI commands that one __arm_smmu_tlb_inv_range() callback can issue, and to replace those TLBI commands with one single per-asid or per-vmid TLBI command. Nicolin Chen (3): iommu/io-pgtable-arm: Add nents_per_pgtable in struct io_pgtable_cfg iommu/arm-smmu-v3: Add an arm_smmu_tlb_inv_domain helper iommu/arm-smmu-v3: Add a max_tlbi_ops for __arm_smmu_tlb_inv_range() drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c | 34 +++++++++++++++------ drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.h | 1 + drivers/iommu/io-pgtable-arm.c | 3 ++ include/linux/io-pgtable.h | 2 ++ 4 files changed, 30 insertions(+), 10 deletions(-)