Message ID | cover.1711690673.git.nicolinc@nvidia.com (mailing list archive) |
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Thu, 28 Mar 2024 23:15:13 -0700 From: Nicolin Chen <nicolinc@nvidia.com> To: <will@kernel.org>, <robin.murphy@arm.com> CC: <joro@8bytes.org>, <jgg@nvidia.com>, <thierry.reding@gmail.com>, <vdumpa@nvidia.com>, <jonathanh@nvidia.com>, <linux-kernel@vger.kernel.org>, <iommu@lists.linux.dev>, <linux-arm-kernel@lists.infradead.org>, <linux-tegra@vger.kernel.org> Subject: [PATCH v4 0/6] Add Tegra241 (Grace) CMDQV Support (part 1/2) Date: Thu, 28 Mar 2024 23:14:04 -0700 Message-ID: <cover.1711690673.git.nicolinc@nvidia.com> X-Mailer: git-send-email 2.43.0 MIME-Version: 1.0 X-NV-OnPremToCloud: ExternallySecured X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: SN1PEPF0002BA50:EE_|SA3PR12MB9107:EE_ X-MS-Office365-Filtering-Correlation-Id: 66a7b4f1-7edb-49c2-1713-08dc4fb79ed7 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: vIYsA02cirRd6Ae4efi+axrqXGroh9R+rNi4W38Sn8LZKX9s2GqeIr8VjE7RMiO1S1NSkJXdmm8pfu+Cp4VwDGsHRpmhGNM716jtm8PxaYCppJTvm2ZjradLR7+A6h9W7/qQjXL5juSjsYSvV2tTv56XdiYs6bB9aBNcHTi+iNNfCd1vC4tR1H3CSsDYjpArXKeUXeXfOm4oy7WxE9ryeNy2e+OsJWbwYMvr4ZGGCQyL32nVB5wKQFc+ynfBzcXemjpJj2zKAwiefi1j9ISE6xlE43doknb5Iex1mQmnr9X5FxBT0oPYX2bvc6mfg5QW/8nlRFPzViWXi8MEtQ7uGuZtGpRGN70Nz0B+tzeILKDHJEH30oX+lfG2IW+f/pLpZIfdEuQQChBCxzgveWApWJ/fJ/g7hmCNEeGrvL+ffu2ncNKjRKhxjtGpQCfgQszhMr8qrSeLkK7l3BKMaJno3pTlD5iBzrpVbNP5/am5uvHs4o3Ruy+eOV6dM4/NJNu/NDy7sz4lfAMgy3xQmwSDJdj/txz8IKSuWys5d1TCqL6H4NarEgRrBkSjpFtt2od6ZOOAGN1kkGCmTBHRdkHvrqCc9zUaZ9bNSTRpo862BHtRIKbCdjSY0HibKPHoiqipvLUZIR2xw1i7A2YwHw2GwhKlxlXRx43n2UMEC6muaNpoVm6mC0c7XiVnDtQP11pv2q4i7kRZGt6aQy841vI6VycjOfXrBoWj3eAHHZ3ZBoyURSIWymoHoDoODDSHlXuwHoH58hxfTrwjqko3SdKfKg== X-Forefront-Antispam-Report: CIP:216.228.118.232;CTRY:US;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:mail.nvidia.com;PTR:dc7edge1.nvidia.com;CAT:NONE;SFS:(13230031)(36860700004)(82310400014)(376005)(1800799015);DIR:OUT;SFP:1101; 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charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" <linux-arm-kernel-bounces@lists.infradead.org> Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org |
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Add Tegra241 (Grace) CMDQV Support (part 1/2)
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expand
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On Thu, Mar 28, 2024 at 11:14:04PM -0700, Nicolin Chen wrote: > It's available on Github: > https://github.com/nicolinc/iommufd/commits/vcmdq_in_kernel-v1 > > And the part-2 series is currently WIP, with a pair of drafts available: > https://github.com/nicolinc/linux-nvidia-6.5/commits/iommufd_nesting-vcmdq/ > https://github.com/nicolinc/qemu/commits/wip/iommufd_vcmdq/ > It's planned to send for review after nested SMMU kernel patches. > > Note that this in-kernel support isn't confined to host kernels running > on Grace-powered servers, but is also used by guest kernels running on > VMs virtualized on those servers. So, those VMs must install the driver, > ideally before the part 2 is merged. So, later those servers would only > need to upgrade their host kernels without bothering the VMs. > > Thank you! > > Changelog > v4: In light of its user-space series (RFC) for VIOMMU infrastructure review, I'll soon post a v5 by reorganizing the driver functions, so that some of the helpers can be reused by the VIOMMU callbacks. Most of the updates will be in the driver patch. So all others are likely the same. Thanks Nicolin