Show patches with: Submitter =       |    State = Action Required       |   160 patches
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Patch Series A/R/T S/W/F Date Submitter Delegate State
[PATCHv2,06/11] EDAC, altera: Add IRQ flags to private data struct - - - --- 2016-03-07 tthayer@opensource.altera.com New
[PATCHv2,05/11] EDAC, altera: Add register offset for ECC Error Clear - - - --- 2016-03-07 tthayer@opensource.altera.com New
[PATCHv2,04/11] EDAC, altera: Add register offset for ECC Error Inject - - - --- 2016-03-07 tthayer@opensource.altera.com New
[PATCHv2,03/11] EDAC, altera: Add register offset for ECC Enable - - - --- 2016-03-07 tthayer@opensource.altera.com New
[PATCHv2,02/11] EDAC, altera: Move Device structs and defines to header file - - - --- 2016-03-07 tthayer@opensource.altera.com New
[PATCHv2,01/11] EDAC: Altera L2 Kconfig change from select to depends upon. - - - --- 2016-03-07 tthayer@opensource.altera.com New
[5/5] ARM: dts: Add Altera Arria10 L2 Cache EDAC devicetree entry - - - --- 2016-03-01 tthayer@opensource.altera.com New
[4/5] ARM: socfpga: Enable Arria10 L2 cache ECC on startup - - - --- 2016-03-01 tthayer@opensource.altera.com New
[3/5] EDAC, altera: Addition of Arria10 L2 Cache ECC - - - --- 2016-03-01 tthayer@opensource.altera.com New
[2/5] Documentation: dt: socfpga: Add Altera Arri10 L2 cache binding - - - --- 2016-03-01 tthayer@opensource.altera.com New
[1/5] EDAC: Altera L2 Kconfig change from select to depends upon. - - - --- 2016-03-01 tthayer@opensource.altera.com New
[PATCHv10,4/4] ARM: socfpga: Enable OCRAM ECC on startup - - - --- 2016-02-10 tthayer@opensource.altera.com New
[PATCHv10,3/4] ARM: socfpga: enable L2 cache ECC on startup - - - --- 2016-02-10 tthayer@opensource.altera.com New
[PATCHv10,2/4] ARM: dts: Add Altera L2 Cache and OCRAM EDAC entries - - - --- 2016-02-10 tthayer@opensource.altera.com New
[PATCHv10,1/4] EDAC, altera: Add Altera L2 Cache and OCRAM EDAC Support - - - --- 2016-02-10 tthayer@opensource.altera.com New
[PATCHv9,4/4] ARM: socfpga: Enable OCRAM ECC on startup - - - --- 2016-01-27 tthayer@opensource.altera.com New
[PATCHv9,3/4] ARM: socfpga: enable L2 cache ECC on startup - - - --- 2016-01-27 tthayer@opensource.altera.com New
[PATCHv9,2/4] ARM: dts: Add Altera L2 Cache and OCRAM EDAC entries - - - --- 2016-01-27 tthayer@opensource.altera.com New
[PATCHv9,1/4] EDAC, altera: Add Altera L2 Cache and OCRAM EDAC Support - - - --- 2016-01-27 tthayer@opensource.altera.com New
[PATCHv8,4/4] ARM: socfpga: Enable OCRAM ECC on startup - - - --- 2016-01-21 tthayer@opensource.altera.com New
[PATCHv8,3/4] ARM: socfpga: enable L2 cache ECC on startup - - - --- 2016-01-21 tthayer@opensource.altera.com New
[PATCHv8,2/4] ARM: dts: Add Altera L2 Cache and OCRAM EDAC entries - - - --- 2016-01-21 tthayer@opensource.altera.com New
[PATCHv8,1/4] EDAC, altera: Add Altera L2 Cache and OCRAM EDAC Support - - - --- 2016-01-21 tthayer@opensource.altera.com New
[PATCHv2,4/4] arm: socfpga: dts: Arria10 SDRAM EDAC DTS additions. - - - --- 2015-06-04 tthayer@opensource.altera.com New
[PATCHv2,3/4] edac, altera: Addition of Arria10 EDAC - - - --- 2015-06-04 tthayer@opensource.altera.com New
[PATCHv2,2/4] edac, altera: Refactor EDAC for Altera CycloneV SoC. - - - --- 2015-06-04 tthayer@opensource.altera.com New
[PATCHv2,1/4] edac, altera: Generalize driver to use DT Memory size - - - --- 2015-06-04 tthayer@opensource.altera.com New
[4/4] dts, altera: Arria10 SDRAM EDAC DTS additions. - - - --- 2015-05-13 tthayer@opensource.altera.com New
[3/4] edac, altera: Addition of Arria10 EDAC - - - --- 2015-05-13 tthayer@opensource.altera.com New
[2/4] edac, altera: Refactor EDAC for Altera CycloneV SoC. - - - --- 2015-05-13 tthayer@opensource.altera.com New
[1/4] edac, altera: Generalize driver to use DT Memory size - - - --- 2015-05-13 tthayer@opensource.altera.com New
[PATCHv6,5/5] arm: dts: Add Altera L2 Cache and OCRAM EDAC entries - - - --- 2015-01-09 tthayer@opensource.altera.com New
[PATCHv6,4/5] edac: altera: Add Altera L2 Cache and OCRAM EDAC Support - - - --- 2015-01-09 tthayer@opensource.altera.com New
[PATCHv6,3/5] edac: altera: Remove SDRAM module compile - - - --- 2015-01-09 tthayer@opensource.altera.com New
[PATCHv6,2/5] arm: socfpga: Enable OCRAM ECC on startup. - - - --- 2015-01-09 tthayer@opensource.altera.com New
[PATCHv6,1/5] arm: socfpga: Enable L2 Cache ECC on startup. - - - --- 2015-01-09 tthayer@opensource.altera.com New
[PATCHv5,5/5] arm: dts: Add Altera L2 Cache and OCRAM EDAC - - - --- 2014-11-12 tthayer@opensource.altera.com New
[PATCHv5,4/5] edac: altera: Add Altera L2 Cache and OCRAM EDAC Support - - - --- 2014-11-12 tthayer@opensource.altera.com New
[PATCHv5,3/5] edac: altera: Remove SDRAM module compile - - - --- 2014-11-12 tthayer@opensource.altera.com New
[PATCHv5,2/5] arm: socfpga: Enable OCRAM ECC on startup. - - - --- 2014-11-12 tthayer@opensource.altera.com New
[PATCHv5,1/5] arm: socfpga: Enable L2 Cache ECC on startup. - - - --- 2014-11-12 tthayer@opensource.altera.com New
[PATCHv4,5/5] arm: dts: Add Altera L2 Cache and OCRAM EDAC - - - --- 2014-11-07 tthayer@opensource.altera.com New
[PATCHv4,4/5] edac: altera: Add Altera L2 Cache and OCRAM EDAC Support - - - --- 2014-11-07 tthayer@opensource.altera.com New
[PATCHv4,3/5] edac: altera: Remove SDRAM module compile - - - --- 2014-11-07 tthayer@opensource.altera.com New
[PATCHv4,2/5] arm: socfpga: Enable OCRAM ECC on startup. - - - --- 2014-11-07 tthayer@opensource.altera.com New
[PATCHv4,1/5] arm: socfpga: Enable L2 Cache ECC on startup. - - - --- 2014-11-07 tthayer@opensource.altera.com New
[PATCHv3,5/5] arm: dts: Add Altera L2 Cache and OCRAM EDAC - - - --- 2014-10-30 tthayer@opensource.altera.com New
[PATCHv3,4/5] edac: altera: Add Altera L2 Cache and OCRAM EDAC Support - - - --- 2014-10-30 tthayer@opensource.altera.com New
[PATCHv3,3/5] edac: altera: Remove SDRAM module compile - - - --- 2014-10-30 tthayer@opensource.altera.com New
[PATCHv3,2/5] arm: socfpga: Enable OCRAM ECC on startup. - - - --- 2014-10-30 tthayer@opensource.altera.com New
[PATCHv3,1/5] arm: socfpga: Enable L2 Cache ECC on startup. - - - --- 2014-10-30 tthayer@opensource.altera.com New
[PATCHv2,4/4] arm: dts: Add Altera L2 Cache and OCRAM EDAC - - - --- 2014-10-17 tthayer@opensource.altera.com New
[PATCHv2,3/4] edac: altera: Add Altera L2 and OCRAM EDAC support - - - --- 2014-10-17 tthayer@opensource.altera.com New
[PATCHv2,2/4] arm: socfpga: Enable OCRAM ECC on startup. - - - --- 2014-10-17 tthayer@opensource.altera.com New
[PATCHv2,1/4] arm: socfpga: Enable L2 Cache ECC on startup. - - - --- 2014-10-17 tthayer@opensource.altera.com New
[PATCHv10,2/2] arm: dts: Add Altera SDRAM EDAC bindings & devicetree entries. - - - --- 2014-08-11 tthayer@opensource.altera.com New
[PATCHv10,1/2] edac: altera: Add Altera SDRAM EDAC support. - - - --- 2014-08-11 tthayer@opensource.altera.com New
[PATCHv9,3/3] arm: dts: Add Altera SDRAM controller bindings - - - --- 2014-07-30 tthayer@opensource.altera.com New
[PATCHv9,2/3] edac: altera: Add Altera EDAC support. - - - --- 2014-07-30 tthayer@opensource.altera.com New
[PATCHv9,1/3] mfd: altera: Add Altera SDRAM Controller - - - --- 2014-07-30 tthayer@opensource.altera.com New
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