diff mbox series

iommu/arm-smmu-v3: Add cpu_to_le64() around STRTAB_STE_0_V

Message ID 0-v1-98b23ebb0c84+9f-smmu_cputole_jgg@nvidia.com (mailing list archive)
State New, archived
Headers show
Series iommu/arm-smmu-v3: Add cpu_to_le64() around STRTAB_STE_0_V | expand

Commit Message

Jason Gunthorpe March 4, 2024, 7:50 p.m. UTC
STRTAB_STE_0_V is a CPU value, it needs conversion for sparse to be clean.

The missing annotation was a mistake introduced by splitting the ops out
from the STE writer.

Fixes: 7da51af9125c ("iommu/arm-smmu-v3: Make STE programming independent of the callers")
Reported-by: kernel test robot <lkp@intel.com>
Closes: https://lore.kernel.org/oe-kbuild-all/202403011441.5WqGrYjp-lkp@intel.com/
Signed-off-by: Jason Gunthorpe <jgg@nvidia.com>
---
 drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

Unclear why 0-day did not notice this when it covered my github..


base-commit: faa6bc241bb0cd181f557d67bfd1de8223014f9e

Comments

Will Deacon March 26, 2024, 5:23 p.m. UTC | #1
On Mon, 04 Mar 2024 15:50:08 -0400, Jason Gunthorpe wrote:
> STRTAB_STE_0_V is a CPU value, it needs conversion for sparse to be clean.
> 
> The missing annotation was a mistake introduced by splitting the ops out
> from the STE writer.
> 
> 

Applied to will (for-joerg/arm-smmu/fixes), thanks!

[1/1] iommu/arm-smmu-v3: Add cpu_to_le64() around STRTAB_STE_0_V
      https://git.kernel.org/will/c/0493e739ccc6

Cheers,
diff mbox series

Patch

diff --git a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c
index b7938f17222b4d..d1bc151a5dff8c 100644
--- a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c
+++ b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c
@@ -1144,7 +1144,8 @@  static void arm_smmu_write_ste(struct arm_smmu_master *master, u32 sid,
 		 * requires a breaking update, zero the V bit, write all qwords
 		 * but 0, then set qword 0
 		 */
-		unused_update.data[0] = entry->data[0] & (~STRTAB_STE_0_V);
+		unused_update.data[0] = entry->data[0] &
+					cpu_to_le64(~STRTAB_STE_0_V);
 		entry_set(smmu, sid, entry, &unused_update, 0, 1);
 		entry_set(smmu, sid, entry, target, 1, num_entry_qwords - 1);
 		entry_set(smmu, sid, entry, target, 0, 1);