From patchwork Thu Nov 22 11:32:57 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Cho KyongHo X-Patchwork-Id: 1783521 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-process-083081@patchwork1.kernel.org Received: from merlin.infradead.org (merlin.infradead.org [205.233.59.134]) by patchwork1.kernel.org (Postfix) with ESMTP id 3C0D83FC64 for ; Thu, 22 Nov 2012 11:37:22 +0000 (UTC) Received: from localhost ([::1] helo=merlin.infradead.org) by merlin.infradead.org with esmtp (Exim 4.76 #1 (Red Hat Linux)) id 1TbV2f-0006jI-7f; Thu, 22 Nov 2012 11:34:01 +0000 Received: from mailout3.samsung.com ([203.254.224.33]) by merlin.infradead.org with esmtp (Exim 4.76 #1 (Red Hat Linux)) id 1TbV22-0006W9-PP for linux-arm-kernel@lists.infradead.org; Thu, 22 Nov 2012 11:33:26 +0000 Received: from epcpsbgm1.samsung.com (epcpsbgm1 [203.254.230.26]) by mailout3.samsung.com (Oracle Communications Messaging Server 7u4-24.01(7.0.4.24.0) 64bit (built Nov 17 2011)) with ESMTP id <0MDW00GLU02WX4P0@mailout3.samsung.com> for linux-arm-kernel@lists.infradead.org; Thu, 22 Nov 2012 20:32:58 +0900 (KST) Received: from epcpsbgm1.samsung.com ( [203.254.230.51]) by epcpsbgm1.samsung.com (EPCPMTA) with SMTP id 16.05.01231.96D0EA05; Thu, 22 Nov 2012 20:32:58 +0900 (KST) X-AuditID: cbfee61a-b7fa66d0000004cf-a3-50ae0d695391 Received: from epmmp1.local.host ( [203.254.227.16]) by epcpsbgm1.samsung.com (EPCPMTA) with SMTP id 55.05.01231.96D0EA05; Thu, 22 Nov 2012 20:32:57 +0900 (KST) Received: from DOPULLIPCHO06 ([12.23.118.152]) by mmp1.samsung.com (Oracle Communications Messaging Server 7u4-24.01 (7.0.4.24.0) 64bit (built Nov 17 2011)) with ESMTPA id <0MDW00I7X02XQS20@mmp1.samsung.com> for linux-arm-kernel@lists.infradead.org; Thu, 22 Nov 2012 20:32:57 +0900 (KST) From: Cho KyongHo To: linux-arm-kernel@lists.infradead.org, linux-samsung-soc@vger.kernel.org, iommu@lists.linux-foundation.org, linux-kernel@vger.kernel.org Subject: [PATCH v4 04/12] iommu/exynos: support for device tree Date: Thu, 22 Nov 2012 20:32:57 +0900 Message-id: <002501cdc8a5$1eb6ade0$5c2409a0$%cho@samsung.com> MIME-version: 1.0 X-Mailer: Microsoft Office Outlook 12.0 Thread-index: Ac3IpR6SGPlBVNiXTl6tTMkWeRZ4zw== Content-language: ko DLP-Filter: Pass X-MTR: 20000000000000000@CPGS X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFtrIIsWRmVeSWpSXmKPExsVy+t8zY90s3nUBBufn8FtsenyN1YHRY/OS +gDGKC6blNSczLLUIn27BK6MV88eMxUcyKro2HeBqYFxRmgXIyeHhICJxIUNt5ggbDGJC/fW s3UxcnEICSxjlHi89DEjTNHBn5ehEosYJdbsPMIK4Sxnkng+azJYO5uAlsTquccZQRIiAr2M Ehf6vzKBOMwCPxglpm/+xQJSJSxgL9GwpxXMZhFQldi9ZRNYN6+ArcTjTZ2MELagxI/J98Bq mIGmrt95nAnClpfYvOYtcxcjB9BN6hKP/uqChEUE9CQ+L77CDlEiIrHvxTtGiPECEt8mH2KB KJeV2HSAGeQcCYFudontz/tZIF6TlDi44gbLBEaxWUg2z0KyeRaSzbOQrFjAyLKKUTS1ILmg OCk911CvODG3uDQvXS85P3cTIyRepHYwrmywOMQowMGoxMOr6bw2QIg1say4MvcQowQHs5II 7z3udQFCvCmJlVWpRfnxRaU5qcWHGH2ALp/ILCWanA+M5bySeENjYxMzE1MTc0tTc1Mcwkri vM0eKQFCAumJJanZqakFqUUw45g4OKUaGM8s/3+9+ID3Ot3OzyeqpQ/FSspOLj/cc7n1tf/n rlfTZvyTiMv59HiBePx0Ddec3CXHuXYmd3zwX3JOqdJ5RuYk7cA5i/q3ZEncPjeV0drEpvzK MvUAjmfr2/+dWrPDfJNRrTr3o0W5T5efZ7cMtPnM5WgdJadvO4+9sv32zwNhfNtKAyZ53ldi Kc5INNRiLipOBAC3dsPcxAIAAA== X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFnrAIsWRmVeSWpSXmKPExsVy+t9jAd1M3nUBBnuv6lpsenyN1YHRY/OS +gDGqAZGm4zUxJTUIoXUvOT8lMy8dFsl7+B453hTMwNDXUNLC3MlhbzE3FRbJRefAF23zByg qUoKZYk5pUChgMTiYiV9O0wTQkPcdC1gGiN0fUOC4HqMDNBAwjrGjFfPHjMVHMiq6Nh3gamB cUZoFyMnh4SAicTBn5fZIGwxiQv31gPZXBxCAosYJdbsPMIK4Sxnkng+azITSBWbgJbE6rnH GUESIgK9jBIX+r8ygTjMAj8YJaZv/sUCUiUsYC/RsKcVzGYRUJXYvWUTWDevgK3E402djBC2 oMSPyffAapiBpq7feZwJwpaX2LzmLXMXIwfQTeoSj/7qgoRFBPQkPi++wg5RIiKx78U7xgmM ArOQTJqFZNIsJJNmIWlZwMiyilE0tSC5oDgpPddQrzgxt7g0L10vOT93EyM4Gp9J7WBc2WBx iFGAg1GJh1fTeW2AEGtiWXFl7iFGCQ5mJRHee9zrAoR4UxIrq1KL8uOLSnNSiw8x+gA9OpFZ SjQ5H5go8kriDY1NzIwsjcwsjEzMzXEIK4nzNnukBAgJpCeWpGanphakFsGMY+LglGpgtO73 XT49TZ2z8lT+Vqc/C846f3/FdyNW/NqktP2rQs7kVs1h/s7hqKD2NeucT9Krh9x/P059tMPO b9H+VdX3b869s3/1XslPF9YLqnr9iS6r8foaIfQ3vGTpM4ln31/22++w5uO8+tpv84YpBic+ lTdphlbouHLz9O5a53Ngg/3GzKJDDRarQ5VYijMSDbWYi4oTAR5lZVzzAgAA X-CFilter-Loop: Reflected X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20121122_063323_232611_70B6A6A9 X-CRM114-Status: GOOD ( 24.10 ) X-Spam-Score: -7.6 (-------) X-Spam-Report: SpamAssassin version 3.3.2 on merlin.infradead.org summary: Content analysis details: (-7.6 points) pts rule name description ---- ---------------------- -------------------------------------------------- -5.0 RCVD_IN_DNSWL_HI RBL: Sender listed at http://www.dnswl.org/, high trust [203.254.224.33 listed in list.dnswl.org] -0.0 SPF_HELO_PASS SPF: HELO matches SPF record -0.7 RP_MATCHES_RCVD Envelope sender domain matches handover relay domain -1.9 BAYES_00 BODY: Bayes spam probability is 0 to 1% [score: 0.0000] 0.0 T_MANY_HDRS_LCASE Odd capitalization of multiple message headers Cc: 'Kukjin Kim' , prathyush.k@samsung.com, 'Joerg Roedel' , sw0312.kim@samsung.com, 'Subash Patel' , 'Sanghyun Lee' , rahul.sharma@samsung.com X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: linux-arm-kernel-bounces@lists.infradead.org Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org This commit adds device tree support for System MMU. Signed-off-by: KyongHo Cho --- drivers/iommu/Kconfig | 2 +- drivers/iommu/exynos-iommu.c | 289 ++++++++++++++++++++++++++----------------- 2 files changed, 177 insertions(+), 114 deletions(-) diff --git a/drivers/iommu/Kconfig b/drivers/iommu/Kconfig index e39f9db..64586f1 100644 --- a/drivers/iommu/Kconfig +++ b/drivers/iommu/Kconfig @@ -168,7 +168,7 @@ config TEGRA_IOMMU_SMMU config EXYNOS_IOMMU bool "Exynos IOMMU Support" - depends on ARCH_EXYNOS && EXYNOS_DEV_SYSMMU + depends on ARCH_EXYNOS select IOMMU_API help Support for the IOMMU(System MMU) of Samsung Exynos application diff --git a/drivers/iommu/exynos-iommu.c b/drivers/iommu/exynos-iommu.c index 7fe44f8..53972c8 100644 --- a/drivers/iommu/exynos-iommu.c +++ b/drivers/iommu/exynos-iommu.c @@ -1,6 +1,6 @@ -/* linux/drivers/iommu/exynos_iommu.c +/* linux/drivers/iommu/exynos-iommu.c * - * Copyright (c) 2011 Samsung Electronics Co., Ltd. + * Copyright (c) 2011-2012 Samsung Electronics Co., Ltd. * http://www.samsung.com * * This program is free software; you can redistribute it and/or modify @@ -12,6 +12,7 @@ #define DEBUG #endif +#include #include #include #include @@ -25,11 +26,10 @@ #include #include #include +#include +#include #include -#include - -#include /* We does not consider super section mapping (16MB) */ #define SECT_ORDER 20 @@ -169,15 +169,14 @@ struct sysmmu_drvdata { struct list_head node; /* entry of exynos_iommu_domain.clients */ struct device *sysmmu; /* System MMU's device descriptor */ struct device *dev; /* Owner of system MMU */ - char *dbgname; int nsfrs; - void __iomem **sfrbases; - struct clk *clk[2]; + struct clk *clk; int activations; rwlock_t lock; struct iommu_domain *domain; sysmmu_fault_handler_t fault_handler; unsigned long pgtable; + void __iomem *sfrbases[0]; }; static bool set_sysmmu_active(struct sysmmu_drvdata *data) @@ -384,8 +383,8 @@ static irqreturn_t exynos_sysmmu_irq(int irq, void *dev_id) if (!ret && (itype != SYSMMU_FAULT_UNKNOWN)) __raw_writel(1 << itype, data->sfrbases[i] + REG_INT_CLEAR); else - dev_dbg(data->sysmmu, "(%s) %s is not handled.\n", - data->dbgname, sysmmu_fault_name[itype]); + dev_dbg(data->sysmmu, "%s is not handled.\n", + sysmmu_fault_name[itype]); if (itype != SYSMMU_FAULT_UNKNOWN) sysmmu_unblock(data->sfrbases[i]); @@ -409,10 +408,8 @@ static bool __exynos_sysmmu_disable(struct sysmmu_drvdata *data) for (i = 0; i < data->nsfrs; i++) __raw_writel(CTRL_DISABLE, data->sfrbases[i] + REG_MMU_CTRL); - if (data->clk[1]) - clk_disable(data->clk[1]); - if (data->clk[0]) - clk_disable(data->clk[0]); + if (data->clk) + clk_disable(data->clk); disabled = true; data->pgtable = 0; @@ -421,10 +418,10 @@ finish: write_unlock_irqrestore(&data->lock, flags); if (disabled) - dev_dbg(data->sysmmu, "(%s) Disabled\n", data->dbgname); + dev_dbg(data->sysmmu, "Disabled\n"); else - dev_dbg(data->sysmmu, "(%s) %d times left to be disabled\n", - data->dbgname, data->activations); + dev_dbg(data->sysmmu, "%d times left to be disabled\n", + data->activations); return disabled; } @@ -451,14 +448,12 @@ static int __exynos_sysmmu_enable(struct sysmmu_drvdata *data, ret = 1; } - dev_dbg(data->sysmmu, "(%s) Already enabled\n", data->dbgname); + dev_dbg(data->sysmmu, "Already enabled\n"); goto finish; } - if (data->clk[0]) - clk_enable(data->clk[0]); - if (data->clk[1]) - clk_enable(data->clk[1]); + if (data->clk) + clk_enable(data->clk); data->pgtable = pgtable; @@ -478,7 +473,7 @@ static int __exynos_sysmmu_enable(struct sysmmu_drvdata *data, data->domain = domain; - dev_dbg(data->sysmmu, "(%s) Enabled\n", data->dbgname); + dev_dbg(data->sysmmu, "Enabled\n"); finish: write_unlock_irqrestore(&data->lock, flags); @@ -494,7 +489,7 @@ int exynos_sysmmu_enable(struct device *dev, unsigned long pgtable) ret = pm_runtime_get_sync(data->sysmmu); if (ret < 0) { - dev_dbg(data->sysmmu, "(%s) Failed to enable\n", data->dbgname); + dev_dbg(data->sysmmu, "Failed to enable\n"); return ret; } @@ -502,8 +497,8 @@ int exynos_sysmmu_enable(struct device *dev, unsigned long pgtable) if (WARN_ON(ret < 0)) { pm_runtime_put(data->sysmmu); dev_err(data->sysmmu, - "(%s) Already enabled with page table %#lx\n", - data->dbgname, data->pgtable); + "Already enabled with page table %#lx\n", + data->pgtable); } else { data->dev = dev; } @@ -540,8 +535,7 @@ static void sysmmu_tlb_invalidate_entry(struct device *dev, unsigned long iova) } } else { dev_dbg(data->sysmmu, - "(%s) Disabled. Skipping invalidating TLB.\n", - data->dbgname); + "Disabled. Skipping invalidating TLB.\n"); } read_unlock_irqrestore(&data->lock, flags); @@ -564,140 +558,209 @@ void exynos_sysmmu_tlb_invalidate(struct device *dev) } } else { dev_dbg(data->sysmmu, - "(%s) Disabled. Skipping invalidating TLB.\n", - data->dbgname); + "Disabled. Skipping invalidating TLB.\n"); } read_unlock_irqrestore(&data->lock, flags); } -static int exynos_sysmmu_probe(struct platform_device *pdev) +static int __init __sysmmu_init_clock(struct device *sysmmu, + struct sysmmu_drvdata *drvdata, + struct device *master) { - int i, ret; - struct device *dev; - struct sysmmu_drvdata *data; + char *conid; + struct clk *parent_clk; + int ret; - dev = &pdev->dev; + drvdata->clk = clk_get(sysmmu, "sysmmu"); + if (IS_ERR(drvdata->clk)) { + dev_dbg(sysmmu, "No gating clock found.\n"); + drvdata->clk = NULL; + return 0; + } - data = kzalloc(sizeof(*data), GFP_KERNEL); - if (!data) { - dev_dbg(dev, "Not enough memory\n"); - ret = -ENOMEM; - goto err_alloc; + if (!master) + return 0; + + conid = dev_get_platdata(sysmmu); + if (!conid) { + dev_dbg(sysmmu, "No parent clock specified.\n"); + return 0; } - ret = dev_set_drvdata(dev, data); + parent_clk = clk_get(master, conid); + if (IS_ERR(parent_clk)) { + parent_clk = clk_get(NULL, conid); + if (IS_ERR(parent_clk)) { + clk_put(drvdata->clk); + dev_err(sysmmu, "No parent clock '%s,%s' found\n", + dev_name(master), conid); + return PTR_ERR(parent_clk); + } + } + + ret = clk_set_parent(drvdata->clk, parent_clk); if (ret) { - dev_dbg(dev, "Unabled to initialize driver data\n"); - goto err_init; + clk_put(drvdata->clk); + dev_err(sysmmu, "Failed to set parent clock '%s,%s'\n", + dev_name(master), conid); } - data->nsfrs = pdev->num_resources / 2; - data->sfrbases = kmalloc(sizeof(*data->sfrbases) * data->nsfrs, - GFP_KERNEL); - if (data->sfrbases == NULL) { - dev_dbg(dev, "Not enough memory\n"); - ret = -ENOMEM; - goto err_init; + clk_put(parent_clk); + + return ret; +} + +static int __init __sysmmu_setup(struct device *sysmmu, + struct sysmmu_drvdata *drvdata) +{ + struct device_node *master_node; + const char *compat; + struct platform_device *pmaster = NULL; + u32 master_inst_no = -1; + int ret; + + master_node = of_parse_phandle(sysmmu->of_node, "mmu-master", 0); + if (!master_node && !of_property_read_string( + sysmmu->of_node, "mmu-master-compat", &compat)) { + of_property_read_u32_array(sysmmu->of_node, + "mmu-master-no", &master_inst_no, 1); + for_each_compatible_node(master_node, NULL, compat) { + pmaster = of_find_device_by_node(master_node); + if (pmaster && (pmaster->id == master_inst_no)) + break; + of_dev_put(pmaster); + pmaster = NULL; + } + } else if (master_node) { + pmaster = of_find_device_by_node(master_node); } + if (!pmaster) { + dev_dbg(sysmmu, "No master device is specified.\n"); + return __sysmmu_init_clock(sysmmu, drvdata, NULL); + } + + pmaster->dev.archdata.iommu = sysmmu; + + ret = __sysmmu_init_clock(sysmmu, drvdata, &pmaster->dev); + if (ret) + dev_err(sysmmu, "Failed to initialize gating clocks\n"); + + of_dev_put(pmaster); + + return ret; +} + +static int __init exynos_sysmmu_probe(struct platform_device *pdev) +{ + int i, ret; + struct device *dev = &pdev->dev; + struct sysmmu_drvdata *data; + + if (pdev->num_resources == 0) { + dev_err(dev, "No System MMU resource defined\n"); + return -ENODEV; + } + + data = devm_kzalloc(dev, + sizeof(*data) + + sizeof(*data->sfrbases) * (pdev->num_resources / 2), + GFP_KERNEL); + if (!data) { + dev_err(dev, "Not enough memory\n"); + return -ENOMEM; + } + + data->nsfrs = pdev->num_resources / 2; + for (i = 0; i < data->nsfrs; i++) { struct resource *res; res = platform_get_resource(pdev, IORESOURCE_MEM, i); if (!res) { - dev_dbg(dev, "Unable to find IOMEM region\n"); - ret = -ENOENT; - goto err_res; + dev_err(dev, "Unable to find IOMEM region\n"); + return -ENOENT; } - data->sfrbases[i] = ioremap(res->start, resource_size(res)); + data->sfrbases[i] = devm_request_and_ioremap(dev, res); if (!data->sfrbases[i]) { - dev_dbg(dev, "Unable to map IOMEM @ PA:%#x\n", + dev_err(dev, "Unable to map IOMEM @ PA:%#x\n", res->start); - ret = -ENOENT; - goto err_res; + return -EBUSY; } } for (i = 0; i < data->nsfrs; i++) { ret = platform_get_irq(pdev, i); if (ret <= 0) { - dev_dbg(dev, "Unable to find IRQ resource\n"); - goto err_irq; + dev_err(dev, "Unable to find IRQ resource\n"); + return ret; } - ret = request_irq(ret, exynos_sysmmu_irq, 0, + ret = devm_request_irq(dev, ret, exynos_sysmmu_irq, 0, dev_name(dev), data); if (ret) { - dev_dbg(dev, "Unabled to register interrupt handler\n"); - goto err_irq; + dev_err(dev, "Unabled to register interrupt handler\n"); + return ret; } } - if (dev_get_platdata(dev)) { - char *deli, *beg; - struct sysmmu_platform_data *platdata = dev_get_platdata(dev); - - beg = platdata->clockname; + pm_runtime_enable(dev); - for (deli = beg; (*deli != '\0') && (*deli != ','); deli++) - /* NOTHING */; + ret = __sysmmu_setup(dev, data); + if (!ret) { + data->sysmmu = dev; + rwlock_init(&data->lock); + INIT_LIST_HEAD(&data->node); - if (*deli == '\0') - deli = NULL; - else - *deli = '\0'; + __set_fault_handler(data, &default_fault_handler); - data->clk[0] = clk_get(dev, beg); - if (IS_ERR(data->clk[0])) { - data->clk[0] = NULL; - dev_dbg(dev, "No clock descriptor registered\n"); - } + platform_set_drvdata(pdev, data); - if (data->clk[0] && deli) { - *deli = ','; - data->clk[1] = clk_get(dev, deli + 1); - if (IS_ERR(data->clk[1])) - data->clk[1] = NULL; - } - - data->dbgname = platdata->dbgname; + dev_dbg(dev, "Initialized\n"); } - data->sysmmu = dev; - rwlock_init(&data->lock); - INIT_LIST_HEAD(&data->node); - - __set_fault_handler(data, &default_fault_handler); - - if (dev->parent) - pm_runtime_enable(dev); - - dev_dbg(dev, "(%s) Initialized\n", data->dbgname); - return 0; -err_irq: - while (i-- > 0) { - int irq; - - irq = platform_get_irq(pdev, i); - free_irq(irq, data); - } -err_res: - while (data->nsfrs-- > 0) - iounmap(data->sfrbases[data->nsfrs]); - kfree(data->sfrbases); -err_init: - kfree(data); -err_alloc: - dev_err(dev, "Failed to initialize\n"); return ret; } -static struct platform_driver exynos_sysmmu_driver = { +/* + * Descriptions of Device Tree node for System MMU + * + * A System MMU should be described by a single tree node. + * + * A System MMU node should have the following properties: + * - reg: tuples of the base address and the size of the IO region of System MMU + * - compatible: it must be "samsung,exynos-sysmmu". + * - interrupt-parent = specify if the interrupt of System MMU is generated by + * interrupt combiner or interrupt controller. + * - interrupts: tuples of interrupt numbers. a tuple has 2 elements if + * @interrupt-parent is '<&combiner>', 3 elements otherwise. + * + * 'mmuname', 'reg' and 'interrupts' properties can be an array if the System + * MMU driver controls several number of System MMUs at the same time. Note that + * the number of elements in those three properties must be the same. + * + * The following properties are optional: + * - mmuname: name of the System MMU for debugging purpose + * - mmu-master: reference to the node of the master device. + * - mmu-master-compat: 'compatible' proberty of the node of the master device + * of System MMU. This is ignored if @mmu-master is currectly specified. + * - mmu-master-no: instance number of the master device of System MMU. This is + * ignored if @mmu-master is correctly specified. This is '0' by default. + */ +#ifdef CONFIG_OF +static struct of_device_id sysmmu_of_match[] __initconst = { + { .compatible = "samsung,exynos-sysmmu", }, + { }, +}; +#endif + +static struct platform_driver exynos_sysmmu_driver __refdata = { .probe = exynos_sysmmu_probe, .driver = { .owner = THIS_MODULE, .name = "exynos-sysmmu", + .of_match_table = of_match_ptr(sysmmu_of_match), } };