From patchwork Tue Jul 26 06:27:30 2011 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Zhu X-Patchwork-Id: 1007102 Received: from merlin.infradead.org (merlin.infradead.org [205.233.59.134]) by demeter2.kernel.org (8.14.4/8.14.4) with ESMTP id p6Q6SFF6030878 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-SHA bits=256 verify=NO) for ; Tue, 26 Jul 2011 06:28:36 GMT Received: from canuck.infradead.org ([2001:4978:20e::1]) by merlin.infradead.org with esmtps (Exim 4.76 #1 (Red Hat Linux)) id 1Qlb7f-0004f8-Gh; Tue, 26 Jul 2011 06:28:07 +0000 Received: from localhost ([127.0.0.1] helo=canuck.infradead.org) by canuck.infradead.org with esmtp (Exim 4.76 #1 (Red Hat Linux)) id 1Qlb7f-0000Z8-3Y; Tue, 26 Jul 2011 06:28:07 +0000 Received: from va3ehsobe001.messaging.microsoft.com ([216.32.180.11] helo=VA3EHSOBE001.bigfish.com) by canuck.infradead.org with esmtps (Exim 4.76 #1 (Red Hat Linux)) id 1Qlb7a-0000Ym-IE for linux-arm-kernel@lists.infradead.org; Tue, 26 Jul 2011 06:28:04 +0000 Received: from mail123-va3-R.bigfish.com (10.7.14.246) by VA3EHSOBE001.bigfish.com (10.7.40.21) with Microsoft SMTP Server id 14.1.225.22; Tue, 26 Jul 2011 06:28:00 +0000 Received: from mail123-va3 (localhost.localdomain [127.0.0.1]) by mail123-va3-R.bigfish.com (Postfix) with ESMTP id 75E70D28320; Tue, 26 Jul 2011 06:28:00 +0000 (UTC) X-SpamScore: -2 X-BigFish: VS-2(zzc89bhc85bh542Mc85dh4015Lb922lc8kzz1202hzz8275ch8275bh8275dhz2dh2a8h668h839h8e2h8e3h34h61h) X-Spam-TCS-SCL: 0:0 X-Forefront-Antispam-Report: CIP:70.37.183.190; KIP:(null); UIP:(null); IPVD:NLI; H:mail.freescale.net; RD:none; EFVD:NLI Received: from mail123-va3 (localhost.localdomain [127.0.0.1]) by mail123-va3 (MessageSwitch) id 1311661657588835_1628; Tue, 26 Jul 2011 06:27:37 +0000 (UTC) Received: from VA3EHSMHS008.bigfish.com (unknown [10.7.14.241]) by mail123-va3.bigfish.com (Postfix) with ESMTP id 7978918C8046; Tue, 26 Jul 2011 06:27:37 +0000 (UTC) Received: from mail.freescale.net (70.37.183.190) by VA3EHSMHS008.bigfish.com (10.7.99.18) with Microsoft SMTP Server (TLS) id 14.1.225.22; Tue, 26 Jul 2011 06:27:31 +0000 Received: from 039-SN1MPN1-006.039d.mgd.msft.net ([169.254.8.11]) by 039-SN1MMR1-003.039d.mgd.msft.net ([10.84.1.16]) with mapi id 14.01.0289.008; Tue, 26 Jul 2011 01:27:30 -0500 From: Zhu Richard-R65037 To: Arnaud Patard , "linux-arm-kernel@lists.infradead.org" Subject: RE: Status of AHCI support for iMX53 and for loco board Thread-Topic: Status of AHCI support for iMX53 and for loco board Thread-Index: AQHMSjRyDpfobgctyE+nXwAjGlz3LZT+JY3Q Date: Tue, 26 Jul 2011 06:27:30 +0000 Message-ID: <010C9052C42A00499CE76D637FA5EE9010A1BD@039-SN1MPN1-006.039d.mgd.msft.net> References: <87k4b7mrfz.fsf@lebrac.rtp-net.org> In-Reply-To: <87k4b7mrfz.fsf@lebrac.rtp-net.org> Accept-Language: en-US Content-Language: en-US X-MS-Has-Attach: yes X-MS-TNEF-Correlator: x-originating-ip: [10.192.242.103] MIME-Version: 1.0 X-OriginatorOrg: freescale.com X-CRM114-Version: 20090807-BlameThorstenAndJenny ( TRE 0.7.6 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20110726_022802_780225_1751781D X-CRM114-Status: GOOD ( 32.83 ) X-Spam-Score: -0.7 (/) X-Spam-Report: SpamAssassin version 3.3.1 on canuck.infradead.org summary: Content analysis details: (-0.7 points) pts rule name description ---- ---------------------- -------------------------------------------------- -0.7 RCVD_IN_DNSWL_LOW RBL: Sender listed at http://www.dnswl.org/, low trust [216.32.180.11 listed in list.dnswl.org] X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.12 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: linux-arm-kernel-bounces@lists.infradead.org Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Greylist: IP, sender and recipient auto-whitelisted, not delayed by milter-greylist-4.2.6 (demeter2.kernel.org [140.211.167.43]); Tue, 26 Jul 2011 06:28:36 +0000 (UTC) Hi Arnaud: the review is proceeded to Version5, and no more comments. The attached files are the latest review email. Best Regards Richard Zhu -----Original Message----- From: Arnaud Patard [mailto:arnaud.patard@rtp-net.org] Sent: 2011?7?25? 3:04 To: linux-arm-kernel@lists.infradead.org Cc: Zhu Richard-R65037 Subject: Status of AHCI support for iMX53 and for loco board Hi, I remember seeing some patches to add ahci support for iMX53 and also to loco/imx53qsb board but I don't see any track of them being on their way to mainline. Have they been merged in some tree and are going to be merged mainline for next kernel release or do they still need some fixes, preventing them to be merged ? Thanks, Arnaud Signed-off-by: Richard Zhu --- arch/arm/mach-mx5/board-mx53_loco.c | 75 +++++++++++++++++++++++++++++++++++ 1 files changed, 75 insertions(+), 0 deletions(-) -- 1.7.1 Signed-off-by: Richard Zhu --- arch/arm/mach-mx5/clock-mx51-mx53.c | 11 +++++ arch/arm/mach-mx5/devices-imx53.h | 4 ++ arch/arm/plat-mxc/Makefile | 1 + arch/arm/plat-mxc/ahci_sata.c | 43 ++++++++++++++++++ arch/arm/plat-mxc/devices/Kconfig | 4 ++ arch/arm/plat-mxc/devices/Makefile | 1 + arch/arm/plat-mxc/devices/platform-ahci-imx.c | 55 +++++++++++++++++++++++ arch/arm/plat-mxc/include/mach/ahci_sata.h | 54 ++++++++++++++++++++++ arch/arm/plat-mxc/include/mach/devices-common.h | 10 ++++ 9 files changed, 183 insertions(+), 0 deletions(-) create mode 100644 arch/arm/plat-mxc/ahci_sata.c create mode 100644 arch/arm/plat-mxc/devices/platform-ahci-imx.c create mode 100644 arch/arm/plat-mxc/include/mach/ahci_sata.h diff --git a/arch/arm/mach-mx5/clock-mx51-mx53.c b/arch/arm/mach-mx5/clock-mx51-mx53.c index 6b89c1b..5d7d861 100644 --- a/arch/arm/mach-mx5/clock-mx51-mx53.c +++ b/arch/arm/mach-mx5/clock-mx51-mx53.c @@ -1387,6 +1387,14 @@ static struct clk esdhc4_mx53_clk = { .secondary = &esdhc4_ipg_clk, }; +static struct clk sata_clk = { + .parent = &ipg_clk, + .enable = _clk_max_enable, + .enable_reg = MXC_CCM_CCGR4, + .enable_shift = MXC_CCM_CCGRx_CG1_OFFSET, + .disable = _clk_max_disable, +}; + DEFINE_CLOCK(mipi_esc_clk, 0, MXC_CCM_CCGR4, MXC_CCM_CCGRx_CG5_OFFSET, NULL, NULL, NULL, &pll2_sw_clk); DEFINE_CLOCK(mipi_hsc2_clk, 0, MXC_CCM_CCGR4, MXC_CCM_CCGRx_CG4_OFFSET, NULL, NULL, &mipi_esc_clk, &pll2_sw_clk); DEFINE_CLOCK(mipi_hsc1_clk, 0, MXC_CCM_CCGR4, MXC_CCM_CCGRx_CG3_OFFSET, NULL, NULL, &mipi_hsc2_clk, &pll2_sw_clk); @@ -1476,6 +1484,9 @@ static struct clk_lookup mx53_lookups[] = { _REGISTER_CLOCK("imx53-cspi.0", NULL, cspi_clk) _REGISTER_CLOCK("imx2-wdt.0", NULL, dummy_clk) _REGISTER_CLOCK("imx2-wdt.1", NULL, dummy_clk) + _REGISTER_CLOCK("ahci.0", NULL, sata_clk) + _REGISTER_CLOCK(NULL, "usb_phy1", usb_phy1_clk) + _REGISTER_CLOCK(NULL, "ahb", ahb_clk) }; static void clk_tree_init(void) diff --git a/arch/arm/mach-mx5/devices-imx53.h b/arch/arm/mach-mx5/devices-imx53.h index 48f4c8c..62d23a1 100644 --- a/arch/arm/mach-mx5/devices-imx53.h +++ b/arch/arm/mach-mx5/devices-imx53.h @@ -32,3 +32,7 @@ extern const struct imx_spi_imx_data imx53_ecspi_data[]; extern const struct imx_imx2_wdt_data imx53_imx2_wdt_data[]; #define imx53_add_imx2_wdt(id, pdata) \ imx_add_imx2_wdt(&imx53_imx2_wdt_data[id]) + +extern const struct imx_ahci_data imx53_ahci_data __initconst; +#define imx53_add_ahci(id, pdata) \ + imx_add_ahci(&imx53_ahci_data, pdata) diff --git a/arch/arm/plat-mxc/Makefile b/arch/arm/plat-mxc/Makefile index a138787..a9386bc 100644 --- a/arch/arm/plat-mxc/Makefile +++ b/arch/arm/plat-mxc/Makefile @@ -19,6 +19,7 @@ obj-$(CONFIG_ARCH_MXC_AUDMUX_V1) += audmux-v1.o obj-$(CONFIG_ARCH_MXC_AUDMUX_V2) += audmux-v2.o obj-$(CONFIG_MXC_DEBUG_BOARD) += 3ds_debugboard.o obj-$(CONFIG_CPU_FREQ_IMX) += cpufreq.o +obj-$(CONFIG_IMX_HAVE_PLATFORM_AHCI) += ahci_sata.o ifdef CONFIG_SND_IMX_SOC obj-y += ssi-fiq.o obj-y += ssi-fiq-ksym.o diff --git a/arch/arm/plat-mxc/ahci_sata.c b/arch/arm/plat-mxc/ahci_sata.c new file mode 100644 index 0000000..1455eaf --- /dev/null +++ b/arch/arm/plat-mxc/ahci_sata.c @@ -0,0 +1,43 @@ +/* + * Copyright (C) 2011 Freescale Semiconductor, Inc. All Rights Reserved. + */ + +/* + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + + * You should have received a copy of the GNU General Public License along + * with this program; if not, write to the Free Software Foundation, Inc., + * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. + */ + +#include +#include +#include + +/* AHCI module Initialization, if return 0, initialization is successful. */ +int sata_init(void __iomem *addr, unsigned long timer1ms) +{ + u32 tmpdata; + + tmpdata = readl(addr + HOST_CAP); + if (!(tmpdata & HOST_CAP_SSS)) { + tmpdata |= HOST_CAP_SSS; + writel(tmpdata, addr + HOST_CAP); + } + + if (!(readl(addr + HOST_PORTS_IMPL) & 0x1)) + writel((readl(addr + HOST_PORTS_IMPL) | 0x1), + addr + HOST_PORTS_IMPL); + + writel(timer1ms, addr + HOST_TIMER1MS); + + return 0; +} diff --git a/arch/arm/plat-mxc/devices/Kconfig b/arch/arm/plat-mxc/devices/Kconfig index bd294ad..f63887b 100644 --- a/arch/arm/plat-mxc/devices/Kconfig +++ b/arch/arm/plat-mxc/devices/Kconfig @@ -76,3 +76,7 @@ config IMX_HAVE_PLATFORM_SDHCI_ESDHC_IMX config IMX_HAVE_PLATFORM_SPI_IMX bool + +config IMX_HAVE_PLATFORM_AHCI + bool + default y if ARCH_MX53 diff --git a/arch/arm/plat-mxc/devices/Makefile b/arch/arm/plat-mxc/devices/Makefile index ad2922a..4d2a1f1 100644 --- a/arch/arm/plat-mxc/devices/Makefile +++ b/arch/arm/plat-mxc/devices/Makefile @@ -24,3 +24,4 @@ obj-$(CONFIG_IMX_HAVE_PLATFORM_MXC_RTC) += platform-mxc_rtc.o obj-$(CONFIG_IMX_HAVE_PLATFORM_MXC_W1) += platform-mxc_w1.o obj-$(CONFIG_IMX_HAVE_PLATFORM_SDHCI_ESDHC_IMX) += platform-sdhci-esdhc-imx.o obj-$(CONFIG_IMX_HAVE_PLATFORM_SPI_IMX) += platform-spi_imx.o +obj-$(CONFIG_IMX_HAVE_PLATFORM_AHCI) += platform-ahci-imx.o diff --git a/arch/arm/plat-mxc/devices/platform-ahci-imx.c b/arch/arm/plat-mxc/devices/platform-ahci-imx.c new file mode 100644 index 0000000..65a76ce --- /dev/null +++ b/arch/arm/plat-mxc/devices/platform-ahci-imx.c @@ -0,0 +1,55 @@ +/* + * Copyright (C) 2011 Freescale Semiconductor, Inc. All Rights Reserved. + */ + +/* + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + + * You should have received a copy of the GNU General Public License along + * with this program; if not, write to the Free Software Foundation, Inc., + * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. + */ + +#include +#include +#include + +#define imx_ahci_data_entry_single(soc) \ + { \ + .iobase = soc ## _SATA_BASE_ADDR, \ + .irq = soc ## _INT_SATA, \ + } + +#ifdef CONFIG_SOC_IMX53 +const struct imx_ahci_data imx53_ahci_data __initconst = + imx_ahci_data_entry_single(MX53); +#endif + +struct platform_device *__init imx_add_ahci( + const struct imx_ahci_data *data, + const struct ahci_platform_data *pdata) +{ + struct resource res[] = { + { + .start = data->iobase, + .end = data->iobase + SZ_4K - 1, + .flags = IORESOURCE_MEM, + }, { + .start = data->irq, + .end = data->irq, + .flags = IORESOURCE_IRQ, + }, + }; + + return imx_add_platform_device_dmamask("ahci", 0, + res, ARRAY_SIZE(res), + pdata, sizeof(*pdata), DMA_BIT_MASK(32)); +} diff --git a/arch/arm/plat-mxc/include/mach/ahci_sata.h b/arch/arm/plat-mxc/include/mach/ahci_sata.h new file mode 100644 index 0000000..dbaaf74 --- /dev/null +++ b/arch/arm/plat-mxc/include/mach/ahci_sata.h @@ -0,0 +1,54 @@ +/* + * Copyright (C) 2011 Freescale Semiconductor, Inc. All Rights Reserved. + */ + +/* + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + + * You should have received a copy of the GNU General Public License along + * with this program; if not, write to the Free Software Foundation, Inc., + * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. + */ + +#ifndef __PLAT_MXC_AHCI_SATA_H__ +#define __PLAT_MXC_AHCI_SATA_H__ + +enum { + HOST_CAP = 0x00, + HOST_CAP_SSS = (1 << 27), /* Staggered Spin-up */ + HOST_PORTS_IMPL = 0x0c, + HOST_TIMER1MS = 0xe0, /* Timer 1-ms */ + /* Offest used to control the MPLL input clk */ + PHY_CR_CLOCK_FREQ_OVRD = 0x12, + /* Port0 SATA Status */ + PORT_SATA_SR = 0x128, + /* Port0 PHY Control */ + PORT_PHY_CTL = 0x178, + /* PORT_PHY_CTL bits */ + PORT_PHY_CTL_CAP_ADR_LOC = 0x10000, + PORT_PHY_CTL_CAP_DAT_LOC = 0x20000, + PORT_PHY_CTL_WRITE_LOC = 0x40000, + PORT_PHY_CTL_READ_LOC = 0x80000, + /* Port0 PHY Status */ + PORT_PHY_SR = 0x17c, + /* PORT_PHY_SR */ + PORT_PHY_STAT_DATA_LOC = 0, + PORT_PHY_STAT_ACK_LOC = 18, + /* SATA PHY Register */ + SATA_PHY_CR_CLOCK_CRCMP_LT_LIMIT = 0x0001, + SATA_PHY_CR_CLOCK_DAC_CTL = 0x0008, + SATA_PHY_CR_CLOCK_RTUNE_CTL = 0x0009, + SATA_PHY_CR_CLOCK_ADC_OUT = 0x000A, + SATA_PHY_CR_CLOCK_MPLL_TST = 0x0017, +}; + +extern int sata_init(void __iomem *addr, unsigned long timer1ms); +#endif /* __PLAT_MXC_AHCI_SATA_H__ */ diff --git a/arch/arm/plat-mxc/include/mach/devices-common.h b/arch/arm/plat-mxc/include/mach/devices-common.h index fa84773..ada88d7 100644 --- a/arch/arm/plat-mxc/include/mach/devices-common.h +++ b/arch/arm/plat-mxc/include/mach/devices-common.h @@ -291,3 +291,13 @@ struct imx_spi_imx_data { struct platform_device *__init imx_add_spi_imx( const struct imx_spi_imx_data *data, const struct spi_imx_master *pdata); + +#include +struct imx_ahci_data { + int id; + resource_size_t iobase; + resource_size_t irq; +}; +struct platform_device *__init imx_add_ahci( + const struct imx_ahci_data *data, + const struct ahci_platform_data *pdata); -- 1.7.1 diff --git a/arch/arm/mach-mx5/board-mx53_loco.c b/arch/arm/mach-mx5/board-mx53_loco.c index 1b947e8..a990992 100644 --- a/arch/arm/mach-mx5/board-mx53_loco.c +++ b/arch/arm/mach-mx5/board-mx53_loco.c @@ -26,6 +26,7 @@ #include #include #include +#include #include #include @@ -39,6 +40,8 @@ #define MX53_LOCO_UI2 IMX_GPIO_NR(2, 15) #define LOCO_FEC_PHY_RST IMX_GPIO_NR(7, 6) +static struct clk *sata_clk, *sata_ref_clk; + static iomux_v3_cfg_t mx53_loco_pads[] = { /* FEC */ MX53_PAD_FEC_MDC__FEC_MDC, @@ -225,6 +228,77 @@ static const struct imxi2c_platform_data mx53_loco_i2c_data __initconst = { .bitrate = 100000, }; +/* HW Initialization, if return 0, initialization is successful. */ +static int mx53_loco_sata_init(struct device *dev, void __iomem *addr) +{ + u32 tmpdata; + int ret = 0; + struct clk *clk; + + sata_clk = clk_get(dev, NULL); + if (IS_ERR(sata_clk)) { + dev_err(dev, "no sata clock.\n"); + return PTR_ERR(sata_clk); + } + ret = clk_enable(sata_clk); + if (ret) { + dev_err(dev, "can't enable sata clock.\n"); + goto put_sata_clk; + } + + /* FSL IMX AHCI SATA uses the internal usb phy1 clk on loco */ + sata_ref_clk = clk_get(NULL, "usb_phy1"); + if (IS_ERR(sata_ref_clk)) { + dev_err(dev, "no sata ref clock.\n"); + ret = PTR_ERR(sata_ref_clk); + goto release_sata_clk; + } + ret = clk_enable(sata_ref_clk); + if (ret) { + dev_err(dev, "can't enable sata ref clock.\n"); + goto put_sata_ref_clk; + } + + /* Get the AHB clock rate, and configure the TIMER1MS reg later */ + clk = clk_get(NULL, "ahb"); + if (IS_ERR(clk)) { + dev_err(dev, "no ahb clock.\n"); + ret = PTR_ERR(clk); + goto release_sata_ref_clk; + } + tmpdata = clk_get_rate(clk) / 1000; + clk_put(clk); + + sata_init(addr, tmpdata); + + return ret; + +release_sata_ref_clk: + clk_disable(sata_ref_clk); +put_sata_ref_clk: + clk_put(sata_ref_clk); +release_sata_clk: + clk_disable(sata_clk); +put_sata_clk: + clk_put(sata_clk); + + return ret; +} + +static void mx53_loco_sata_exit(struct device *dev) +{ + clk_disable(sata_ref_clk); + clk_put(sata_ref_clk); + + clk_disable(sata_clk); + clk_put(sata_clk); +} + +static struct ahci_platform_data sata_data = { + .init = mx53_loco_sata_init, + .exit = mx53_loco_sata_exit, +}; + static void __init mx53_loco_board_init(void) { mxc_iomux_v3_setup_multiple_pads(mx53_loco_pads, @@ -238,6 +312,7 @@ static void __init mx53_loco_board_init(void) imx53_add_sdhci_esdhc_imx(0, NULL); imx53_add_sdhci_esdhc_imx(2, NULL); imx_add_gpio_keys(&loco_button_data); + imx53_add_ahci(0, &sata_data); } static void __init mx53_loco_timer_init(void)