From patchwork Tue Nov 13 04:54:43 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Kim Kukjin X-Patchwork-Id: 1732211 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-process-083081@patchwork2.kernel.org Received: from merlin.infradead.org (merlin.infradead.org [205.233.59.134]) by patchwork2.kernel.org (Postfix) with ESMTP id BFE13DF280 for ; Tue, 13 Nov 2012 04:57:02 +0000 (UTC) Received: from localhost ([::1] helo=merlin.infradead.org) by merlin.infradead.org with esmtp (Exim 4.76 #1 (Red Hat Linux)) id 1TY8WX-0008E5-30; Tue, 13 Nov 2012 04:54:57 +0000 Received: from mailout4.samsung.com ([203.254.224.34]) by merlin.infradead.org with esmtp (Exim 4.76 #1 (Red Hat Linux)) id 1TY8WR-0008Df-P6 for linux-arm-kernel@lists.infradead.org; Tue, 13 Nov 2012 04:54:54 +0000 Received: from epcpsbgm2.samsung.com (epcpsbgm2 [203.254.230.27]) by mailout4.samsung.com (Oracle Communications Messaging Server 7u4-24.01(7.0.4.24.0) 64bit (built Nov 17 2011)) with ESMTP id <0MDE00C1UTM6GOI0@mailout4.samsung.com> for linux-arm-kernel@lists.infradead.org; Tue, 13 Nov 2012 13:54:43 +0900 (KST) Received: from epcpsbgm2.samsung.com ( [203.254.230.48]) by epcpsbgm2.samsung.com (EPCPMTA) with SMTP id FA.E4.12699.392D1A05; Tue, 13 Nov 2012 13:54:43 +0900 (KST) X-AuditID: cbfee61b-b7f616d00000319b-d5-50a1d29330cc Received: from epmmp2 ( [203.254.227.17]) by epcpsbgm2.samsung.com (EPCPMTA) with SMTP id AA.E4.12699.392D1A05; Tue, 13 Nov 2012 13:54:43 +0900 (KST) Received: from DOKGENEKIM03 ([12.23.120.199]) by mmp2.samsung.com (Oracle Communications Messaging Server 7u4-24.01 (7.0.4.24.0) 64bit (built Nov 17 2011)) with ESMTPA id <0MDE0096BTN7DR50@mmp2.samsung.com> for linux-arm-kernel@lists.infradead.org; Tue, 13 Nov 2012 13:54:43 +0900 (KST) From: Kukjin Kim To: linux-arm-kernel@lists.infradead.org, linux-samsung-soc@vger.kernel.org References: <1351274153-3120-1-git-send-email-kgene.kim@samsung.com> <1351274153-3120-2-git-send-email-kgene.kim@samsung.com> In-reply-to: <1351274153-3120-2-git-send-email-kgene.kim@samsung.com> Subject: [PATCH 1/7 v2] ARM: EXYNOS: add support for EXYNOS5440 SoC Date: Tue, 13 Nov 2012 13:54:43 +0900 Message-id: <01a101cdc15a$ff004e80$fd00eb80$%kim@samsung.com> MIME-version: 1.0 X-Mailer: Microsoft Office Outlook 12.0 Thread-index: Ac2zozOUvX85sEZIRJ6FXzv8eMCp1ANtp8uw Content-language: ko DLP-Filter: Pass X-MTR: 20000000000000000@CPGS X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFjrGIsWRmVeSWpSXmKPExsVy+t8zA93JlxYGGBxco2Cx6fE1VgdGj81L 6gMYo7hsUlJzMstSi/TtErgyNs89yF5wu7jiwYxfTA2MlxO6GDk5JARMJFY3b2SCsMUkLtxb z9bFyMUhJLCMUWL61/WsMEWLX1yFSkxnlDh3eiIzVBWTxKa3H5lBqtgENCQOv3/G3sXIwSEi 4C2x/JoiSJgZKPxo6h92EFtIoF7iyrvLbCA2p4CrxO0DF8E2Cws4S/ybf5YFxGYRUJVoeXgR rIZXwFbiwbwf7BC2oMSPyfdYIGZqSazfeZwJwpaX2LzmLTPIWgkBdYlHf3VBwiICRhIv1vyE KhGR2PfiHSPEeAGJb5MPsUCUy0psOgD2iYTAInaJS7d2skP8KylxcMUNlgmMErOQbJ6FZPMs JJtnIVmxgJFlFaNoakFyQXFSeq6RXnFibnFpXrpecn7uJkZIZEnvYFzVYHGIUYCDUYmHV9Fy YYAQa2JZcWXuIUYJDmYlEV7zeqAQb0piZVVqUX58UWlOavEhRh+gyycyS4km5wOjPq8k3tDY 2MTMxNTE3NLU3BSHsJI4b7NHSoCQQHpiSWp2ampBahHMOCYOTqkGxvC3DF0ax61tjWue73TP MjxxJmV7xqv2mu4FQuVy8Sfl86fkFR//rHXXsZp1n3C64ns7Hnu33/kXJhcVHdCb0eh28EaQ 7t0J2vatRx1YdZNZ5ly//+HVGr+nO58/T5q+Qbg0WuO5QcUCJpGCmkBm41az1PUmv4SldmXL T2ZijFDkvGO3mrNLiaU4I9FQi7moOBEAXKsLOtkCAAA= X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFvrKIsWRmVeSWpSXmKPExsVy+t9jQd3JlxYGGGz+KWWx6fE1VgdGj81L 6gMYoxoYbTJSE1NSixRS85LzUzLz0m2VvIPjneNNzQwMdQ0tLcyVFPISc1NtlVx8AnTdMnOA pioplCXmlAKFAhKLi5X07TBNCA1x07WAaYzQ9Q0JgusxMkADCesYMzbPPchecLu44sGMX0wN jJcTuhg5OSQETCQWv7jKBmGLSVy4tx7I5uIQEpjOKHHu9ERmCGcZk8Smtx+ZQarYBDQkDr9/ xt7FyMEhIuAtsfyaIkiYGSj8aOofdhBbSKBe4sq7y2BDOQVcJW4fuMgEYgsLOEv8m3+WBcRm EVCVaHl4EayGV8BW4sG8H+wQtqDEj8n3WCBmakms33mcCcKWl9i85i0zyFoJAXWJR391QcIi AkYSL9b8hCoRkdj34h3jBEahWUgmzUIyaRaSSbOQtCxgZFnFKJpakFxQnJSea6RXnJhbXJqX rpecn7uJERy3z6R3MK5qsDjEKMDBqMTDq2i5MECINbGsuDL3EKMEB7OSCK95PVCINyWxsiq1 KD++qDQntfgQow/QoxOZpUST84EpJa8k3tDYxMzI0sjMwsjE3ByHsJI4b7NHSoCQQHpiSWp2 ampBahHMOCYOTqkGxikROlKbe5f+W7WrcNHEfi6341W64c8dBWa8KhFcIDBDKWROc/dLA45t 285PbdSLnVd3rXgfo9mrJ526z9baC26d6FElv/hZ56GUbY52vB+6t5hEGDS6P6na+fuTd5nz g8xKzyXs4QtPCb5nc3qh6m+Q0BVacdBSlsFx1exd7zfozPRTey1Vo8RSnJFoqMVcVJwIAJZF kZcIAwAA X-CFilter-Loop: Reflected X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20121112_235452_412931_EF2EB1B6 X-CRM114-Status: GOOD ( 27.69 ) X-Spam-Score: -7.6 (-------) X-Spam-Report: SpamAssassin version 3.3.2 on merlin.infradead.org summary: Content analysis details: (-7.6 points) pts rule name description ---- ---------------------- -------------------------------------------------- -5.0 RCVD_IN_DNSWL_HI RBL: Sender listed at http://www.dnswl.org/, high trust [203.254.224.34 listed in list.dnswl.org] -0.0 SPF_HELO_PASS SPF: HELO matches SPF record -0.7 RP_MATCHES_RCVD Envelope sender domain matches handover relay domain -1.9 BAYES_00 BODY: Bayes spam probability is 0 to 1% [score: 0.0000] Cc: 'Kukjin Kim' X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: linux-arm-kernel-bounces@lists.infradead.org Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org This patch adds support for EXYNOS5440 SoC which is including ARM Cortex-A15 Quad cores. Signed-off-by: Kukjin Kim --- Changes since v1: - Removed MACH_EXYNOS5440_DT because we can support it with MACH_EXYNOS5_DT - Removed exynos_init_uarts() calling because it is not required for DT - Removed GIC io-mapping entry because DT can support for runtime io-remapping - Removed exynos5440_dt_irq_match[] table because of exynos5_dt_irq_match[] - Removed UART resource because it is not required for DT Note, this is based on Samsun COMMON CLK stuff submitted by Thomas Abraham. arch/arm/mach-exynos/Kconfig | 12 ++++- arch/arm/mach-exynos/Makefile | 2 +- arch/arm/mach-exynos/common.c | 68 +++++++++++++++++++++++-- arch/arm/mach-exynos/include/mach/irqs.h | 5 ++ arch/arm/mach-exynos/include/mach/map.h | 5 ++ arch/arm/mach-exynos/include/mach/regs-pmu.h | 1 + arch/arm/mach-exynos/mach-exynos5-dt.c | 22 +++++--- arch/arm/mach-exynos/mct.c | 11 +++- arch/arm/mach-exynos/setup-i2c0.c | 2 +- arch/arm/plat-samsung/include/plat/cpu.h | 8 +++ drivers/tty/serial/samsung.c | 3 +- 11 files changed, 118 insertions(+), 21 deletions(-) diff --git a/arch/arm/mach-exynos/Kconfig b/arch/arm/mach-exynos/Kconfig index 1d0d083..418c051 100644 --- a/arch/arm/mach-exynos/Kconfig +++ b/arch/arm/mach-exynos/Kconfig @@ -68,6 +68,16 @@ config SOC_EXYNOS5250 help Enable EXYNOS5250 SoC support +config SOC_EXYNOS5440 + bool "SAMSUNG EXYNOS5440" + default y + depends on ARCH_EXYNOS5 + select ARM_ARCH_TIMER + select AUTO_ZRELADDR + select COMMON_CLK + help + Enable EXYNOS5440 SoC support + config EXYNOS4_MCT bool default y @@ -418,9 +428,9 @@ config MACH_EXYNOS4_DT config MACH_EXYNOS5_DT bool "SAMSUNG EXYNOS5 Machine using device tree" + default y depends on ARCH_EXYNOS5 select ARM_AMBA - select SOC_EXYNOS5250 select USE_OF help Machine support for Samsung EXYNOS5 machine with device tree enabled. diff --git a/arch/arm/mach-exynos/Makefile b/arch/arm/mach-exynos/Makefile index ad66c9f4..0dcf389 100644 --- a/arch/arm/mach-exynos/Makefile +++ b/arch/arm/mach-exynos/Makefile @@ -13,7 +13,7 @@ obj- := # Core obj-$(CONFIG_ARCH_EXYNOS) += common.o -obj-$(CONFIG_ARCH_EXYNOS5) += clock-exynos5.o +obj-$(CONFIG_SOC_EXYNOS5250) += clock-exynos5.o obj-$(CONFIG_PM) += pm.o obj-$(CONFIG_PM_GENERIC_DOMAINS) += pm_domains.o diff --git a/arch/arm/mach-exynos/common.c b/arch/arm/mach-exynos/common.c index 1ca2d88..2891ff4 100644 --- a/arch/arm/mach-exynos/common.c +++ b/arch/arm/mach-exynos/common.c @@ -58,9 +58,11 @@ static const char name_exynos4210[] = "EXYNOS4210"; static const char name_exynos4212[] = "EXYNOS4212"; static const char name_exynos4412[] = "EXYNOS4412"; static const char name_exynos5250[] = "EXYNOS5250"; +static const char name_exynos5440[] = "EXYNOS5440"; static void exynos4_map_io(void); static void exynos5_map_io(void); +static void exynos5440_map_io(void); static void exynos5_init_clocks(int xtal); static void exynos_init_uarts(struct s3c2410_uartcfg *cfg, int no); static int exynos_init(void); @@ -95,6 +97,12 @@ static struct cpu_table cpu_ids[] __initdata = { .init_uarts = exynos_init_uarts, .init = exynos_init, .name = name_exynos5250, + }, { + .idcode = EXYNOS5440_SOC_ID, + .idmask = EXYNOS5_SOC_MASK, + .map_io = exynos5440_map_io, + .init = exynos_init, + .name = name_exynos5440, }, }; @@ -109,6 +117,15 @@ static struct map_desc exynos_iodesc[] __initdata = { }, }; +static struct map_desc exynos5440_iodesc[] __initdata = { + { + .virtual = (unsigned long)S5P_VA_CHIPID, + .pfn = __phys_to_pfn(EXYNOS5440_PA_CHIPID), + .length = SZ_4K, + .type = MT_DEVICE, + }, +}; + static struct map_desc exynos4_iodesc[] __initdata = { { .virtual = (unsigned long)S3C_VA_SYS, @@ -275,6 +292,15 @@ static struct map_desc exynos5_iodesc[] __initdata = { }, }; +static struct map_desc exynos5440_iodesc0[] __initdata = { + { + .virtual = (unsigned long)S3C_VA_UART, + .pfn = __phys_to_pfn(EXYNOS5440_PA_UART0), + .length = SZ_512K, + .type = MT_DEVICE, + }, +}; + void exynos4_restart(char mode, const char *cmd) { __raw_writel(0x1, S5P_SWRESET); @@ -282,11 +308,29 @@ void exynos4_restart(char mode, const char *cmd) void exynos5_restart(char mode, const char *cmd) { - __raw_writel(0x1, EXYNOS_SWRESET); + u32 val; + void __iomem *addr; + + if (of_machine_is_compatible("samsung,exynos5250")) { + val = 0x1; + addr = EXYNOS_SWRESET; + } else if (of_machine_is_compatible("samsung,exynos5440")) { + val = (0x10 << 20) | (0x1 << 16); + addr = EXYNOS5440_SWRESET; + } else { + pr_err("%s: cannot support non-DT\n", __func__); + return; + } + + __raw_writel(val, addr); } void __init exynos_init_late(void) { + if (of_machine_is_compatible("samsung,exynos5440")) + /* to be supported later */ + return; + exynos_pm_late_initcall(); } @@ -299,7 +343,11 @@ void __init exynos_init_late(void) void __init exynos_init_io(struct map_desc *mach_desc, int size) { /* initialize the io descriptors we need for initialization */ - iotable_init(exynos_iodesc, ARRAY_SIZE(exynos_iodesc)); + if (of_machine_is_compatible("samsung,exynos5440")) + iotable_init(exynos5440_iodesc, ARRAY_SIZE(exynos5440_iodesc)); + else + iotable_init(exynos_iodesc, ARRAY_SIZE(exynos_iodesc)); + if (mach_desc) iotable_init(mach_desc, size); @@ -369,6 +417,11 @@ static void __init exynos5_map_io(void) s3c64xx_spi_setname("exynos4210-spi"); } +static void __init exynos5440_map_io(void) +{ + iotable_init(exynos5440_iodesc0, ARRAY_SIZE(exynos5440_iodesc0)); +} + static void __init exynos5_init_clocks(int xtal) { printk(KERN_DEBUG "%s: initializing clocks\n", __func__); @@ -586,8 +639,9 @@ int __init combiner_of_init(struct device_node *np, struct device_node *parent) return 0; } -static const struct of_device_id exynos4_dt_irq_match[] = { +static const struct of_device_id exynos_dt_irq_match[] = { { .compatible = "arm,cortex-a9-gic", .data = gic_of_init, }, + { .compatible = "arm,cortex-a15-gic", .data = gic_of_init, }, { .compatible = "samsung,exynos4210-combiner", .data = combiner_of_init, }, {}, @@ -604,7 +658,7 @@ void __init exynos4_init_irq(void) gic_init_bases(0, IRQ_PPI(0), S5P_VA_GIC_DIST, S5P_VA_GIC_CPU, gic_bank_offset, NULL); #ifdef CONFIG_OF else - of_irq_init(exynos4_dt_irq_match); + of_irq_init(exynos_dt_irq_match); #endif if (!of_have_populated_dt()) @@ -621,7 +675,7 @@ void __init exynos4_init_irq(void) void __init exynos5_init_irq(void) { #ifdef CONFIG_OF - of_irq_init(exynos4_dt_irq_match); + of_irq_init(exynos_dt_irq_match); #endif /* * The parameters of s5p_init_irq() are for VIC init. @@ -651,7 +705,7 @@ static int __init exynos4_l2x0_cache_init(void) { int ret; - if (soc_is_exynos5250()) + if (soc_is_exynos5250() || soc_is_exynos5440()) return 0; ret = l2x0_of_init(L2_AUX_VAL, L2_AUX_MASK); @@ -992,6 +1046,8 @@ static int __init exynos_init_irq_eint(void) } } #endif + if (soc_is_exynos5440()) + return 0; if (soc_is_exynos5250()) exynos_eint_base = ioremap(EXYNOS5_PA_GPIO1, SZ_4K); diff --git a/arch/arm/mach-exynos/include/mach/irqs.h b/arch/arm/mach-exynos/include/mach/irqs.h index 35bced6..f43a96c 100644 --- a/arch/arm/mach-exynos/include/mach/irqs.h +++ b/arch/arm/mach-exynos/include/mach/irqs.h @@ -333,6 +333,11 @@ #define EXYNOS5_IRQ_FIMC_LITE1 IRQ_SPI(126) #define EXYNOS5_IRQ_RP_TIMER IRQ_SPI(127) +/* EXYNOS5440 */ + +#define EXYNOS5440_IRQ_UART0 IRQ_SPI(2) +#define EXYNOS5440_IRQ_UART1 IRQ_SPI(3) + #define EXYNOS5_IRQ_PMU COMBINER_IRQ(1, 2) #define EXYNOS5_IRQ_SYSMMU_GSC0_0 COMBINER_IRQ(2, 0) diff --git a/arch/arm/mach-exynos/include/mach/map.h b/arch/arm/mach-exynos/include/mach/map.h index 8480849..aa3760e 100644 --- a/arch/arm/mach-exynos/include/mach/map.h +++ b/arch/arm/mach-exynos/include/mach/map.h @@ -53,6 +53,7 @@ #define EXYNOS4_PA_ONENAND_DMA 0x0C600000 #define EXYNOS_PA_CHIPID 0x10000000 +#define EXYNOS5440_PA_CHIPID 0x00160000 #define EXYNOS4_PA_SYSCON 0x10010000 #define EXYNOS5_PA_SYSCON 0x10050100 @@ -281,6 +282,10 @@ #define EXYNOS5_PA_UART3 0x12C30000 #define EXYNOS5_SZ_UART SZ_256 +#define EXYNOS5440_PA_UART0 0x000B0000 +#define EXYNOS5440_PA_UART1 0x000C0000 +#define EXYNOS5440_SZ_UART SZ_256 + #define S3C_VA_UARTx(x) (S3C_VA_UART + ((x) * S3C_UART_OFFSET)) #endif /* __ASM_ARCH_MAP_H */ diff --git a/arch/arm/mach-exynos/include/mach/regs-pmu.h b/arch/arm/mach-exynos/include/mach/regs-pmu.h index d4e392b..c0b74f3 100644 --- a/arch/arm/mach-exynos/include/mach/regs-pmu.h +++ b/arch/arm/mach-exynos/include/mach/regs-pmu.h @@ -31,6 +31,7 @@ #define S5P_SWRESET S5P_PMUREG(0x0400) #define EXYNOS_SWRESET S5P_PMUREG(0x0400) +#define EXYNOS5440_SWRESET S5P_PMUREG(0x00C4) #define S5P_WAKEUP_STAT S5P_PMUREG(0x0600) #define S5P_EINT_WAKEUP_MASK S5P_PMUREG(0x0604) diff --git a/arch/arm/mach-exynos/mach-exynos5-dt.c b/arch/arm/mach-exynos/mach-exynos5-dt.c index db1cd8e..3b82a1a 100644 --- a/arch/arm/mach-exynos/mach-exynos5-dt.c +++ b/arch/arm/mach-exynos/mach-exynos5-dt.c @@ -75,20 +75,24 @@ static const struct of_dev_auxdata exynos5250_auxdata_lookup[] __initconst = { {}, }; -static void __init exynos5250_dt_map_io(void) +static void __init exynos5_dt_map_io(void) { exynos_init_io(NULL, 0); - s3c24xx_init_clocks(24000000); + + if (of_machine_is_compatible("samsung,exynos5250")) + s3c24xx_init_clocks(24000000); } -static void __init exynos5250_dt_machine_init(void) +static void __init exynos5_dt_machine_init(void) { - of_platform_populate(NULL, of_default_bus_match_table, - exynos5250_auxdata_lookup, NULL); + if (of_machine_is_compatible("samsung,exynos5250")) + of_platform_populate(NULL, of_default_bus_match_table, + exynos5250_auxdata_lookup, NULL); } -static char const *exynos5250_dt_compat[] __initdata = { +static char const *exynos5_dt_compat[] __initdata = { "samsung,exynos5250", + "samsung,exynos5440", NULL }; @@ -96,11 +100,11 @@ DT_MACHINE_START(EXYNOS5_DT, "SAMSUNG EXYNOS5 (Flattened Device Tree)") /* Maintainer: Kukjin Kim */ .init_irq = exynos5_init_irq, .smp = smp_ops(exynos_smp_ops), - .map_io = exynos5250_dt_map_io, + .map_io = exynos5_dt_map_io, .handle_irq = gic_handle_irq, - .init_machine = exynos5250_dt_machine_init, + .init_machine = exynos5_dt_machine_init, .init_late = exynos_init_late, .timer = &exynos4_timer, - .dt_compat = exynos5250_dt_compat, + .dt_compat = exynos5_dt_compat, .restart = exynos5_restart, MACHINE_END diff --git a/arch/arm/mach-exynos/mct.c b/arch/arm/mach-exynos/mct.c index cc3805a..8d05cf1 100644 --- a/arch/arm/mach-exynos/mct.c +++ b/arch/arm/mach-exynos/mct.c @@ -19,7 +19,9 @@ #include #include #include +#include +#include #include #include @@ -478,7 +480,7 @@ static void __init exynos4_timer_resources(void) #endif /* CONFIG_LOCAL_TIMERS */ } -static void __init exynos4_timer_init(void) +static void __init exynos_timer_init(void) { #ifdef CONFIG_COMMON_CLK if (soc_is_exynos4210()) @@ -487,6 +489,11 @@ static void __init exynos4_timer_init(void) exynos4x12_clk_init(); #endif + if (soc_is_exynos5440()) { + arch_timer_of_register(); + return; + } + if ((soc_is_exynos4210()) || (soc_is_exynos5250())) mct_int_type = MCT_INT_SPI; else @@ -498,5 +505,5 @@ static void __init exynos4_timer_init(void) } struct sys_timer exynos4_timer = { - .init = exynos4_timer_init, + .init = exynos_timer_init, }; diff --git a/arch/arm/mach-exynos/setup-i2c0.c b/arch/arm/mach-exynos/setup-i2c0.c index 5700f23..e2d9dfb 100644 --- a/arch/arm/mach-exynos/setup-i2c0.c +++ b/arch/arm/mach-exynos/setup-i2c0.c @@ -20,7 +20,7 @@ struct platform_device; /* don't need the contents */ void s3c_i2c0_cfg_gpio(struct platform_device *dev) { - if (soc_is_exynos5250()) + if (soc_is_exynos5250() || soc_is_exynos5440()) /* will be implemented with gpio function */ return; diff --git a/arch/arm/plat-samsung/include/plat/cpu.h b/arch/arm/plat-samsung/include/plat/cpu.h index ace4451..e0072ce 100644 --- a/arch/arm/plat-samsung/include/plat/cpu.h +++ b/arch/arm/plat-samsung/include/plat/cpu.h @@ -43,6 +43,7 @@ extern unsigned long samsung_cpu_id; #define EXYNOS4_CPU_MASK 0xFFFE0000 #define EXYNOS5250_SOC_ID 0x43520000 +#define EXYNOS5440_SOC_ID 0x54400000 #define EXYNOS5_SOC_MASK 0xFFFFF000 #define IS_SAMSUNG_CPU(name, id, mask) \ @@ -62,6 +63,7 @@ IS_SAMSUNG_CPU(exynos4210, EXYNOS4210_CPU_ID, EXYNOS4_CPU_MASK) IS_SAMSUNG_CPU(exynos4212, EXYNOS4212_CPU_ID, EXYNOS4_CPU_MASK) IS_SAMSUNG_CPU(exynos4412, EXYNOS4412_CPU_ID, EXYNOS4_CPU_MASK) IS_SAMSUNG_CPU(exynos5250, EXYNOS5250_SOC_ID, EXYNOS5_SOC_MASK) +IS_SAMSUNG_CPU(exynos5440, EXYNOS5440_SOC_ID, EXYNOS5_SOC_MASK) #if defined(CONFIG_CPU_S3C2410) || defined(CONFIG_CPU_S3C2412) || \ defined(CONFIG_CPU_S3C2416) || defined(CONFIG_CPU_S3C2440) || \ @@ -130,6 +132,12 @@ IS_SAMSUNG_CPU(exynos5250, EXYNOS5250_SOC_ID, EXYNOS5_SOC_MASK) # define soc_is_exynos5250() 0 #endif +#if defined(CONFIG_SOC_EXYNOS5440) +# define soc_is_exynos5440() is_samsung_exynos5440() +#else +# define soc_is_exynos5440() 0 +#endif + #define IODESC_ENT(x) { (unsigned long)S3C24XX_VA_##x, __phys_to_pfn(S3C24XX_PA_##x), S3C24XX_SZ_##x, MT_DEVICE } #ifndef KHZ diff --git a/drivers/tty/serial/samsung.c b/drivers/tty/serial/samsung.c index 7f04717..0e26a16 100644 --- a/drivers/tty/serial/samsung.c +++ b/drivers/tty/serial/samsung.c @@ -1646,7 +1646,8 @@ static struct s3c24xx_serial_drv_data s5pv210_serial_drv_data = { #endif #if defined(CONFIG_CPU_EXYNOS4210) || defined(CONFIG_SOC_EXYNOS4212) || \ - defined(CONFIG_SOC_EXYNOS4412) || defined(CONFIG_SOC_EXYNOS5250) + defined(CONFIG_SOC_EXYNOS4412) || defined(CONFIG_SOC_EXYNOS5250) || \ + defined(CONFIG_SOC_EXYNOS5440) static struct s3c24xx_serial_drv_data exynos4210_serial_drv_data = { .info = &(struct s3c24xx_uart_info) { .name = "Samsung Exynos4 UART",