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[81.204.249.205]) by smtp.gmail.com with ESMTPSA id kv23-20020a17090778d700b008699bacc03csm11898900ejc.14.2023.01.21.03.10.03 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Sat, 21 Jan 2023 03:10:04 -0800 (PST) Message-ID: <0266aabd-2991-2958-ab1e-55f58ab14461@gmail.com> Date: Sat, 21 Jan 2023 12:10:03 +0100 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:102.0) Gecko/20100101 Thunderbird/102.3.0 From: Johan Jonker Subject: [PATCH v2 8/8] ARM: dts: rockchip: rk3066a: move gpio nodes to root To: linus.walleij@linaro.org, brgl@bgdev.pl Cc: robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, heiko@sntech.de, linux-gpio@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org, kever.yang@rock-chips.com, sjg@chromium.org, philipp.tomsich@vrull.eu, john@metanate.com, quentin.schulz@theobroma-systems.com References: <03627216-54b5-5d9b-f91d-adcd637819e3@gmail.com> Content-Language: en-US In-Reply-To: <03627216-54b5-5d9b-f91d-adcd637819e3@gmail.com> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20230121_031005_461775_C17327DC X-CRM114-Status: UNSURE ( 9.83 ) X-CRM114-Notice: Please train this message. X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org The relation between gpio and pinctrl is now described by the gpio-ranges property. Move rk3066a gpio nodes to root. Signed-off-by: Johan Jonker --- arch/arm/boot/dts/rk3066a.dtsi | 159 +++++++++++++++------------------ 1 file changed, 72 insertions(+), 87 deletions(-) -- 2.20.1 diff --git a/arch/arm/boot/dts/rk3066a.dtsi b/arch/arm/boot/dts/rk3066a.dtsi index 4d7cf6f1b..ac329cf14 100644 --- a/arch/arm/boot/dts/rk3066a.dtsi +++ b/arch/arm/boot/dts/rk3066a.dtsi @@ -217,6 +217,18 @@ <150000000>, <75000000>; }; + gpio6: gpio@2000a000 { + compatible = "rockchip,rk3066a-gpio-bank", "rockchip,gpio-bank"; + reg = <0x2000a000 0x100>; + interrupts = ; + clocks = <&cru PCLK_GPIO6>; + gpio-controller; + gpio-ranges = <&pinctrl 0 192 32>; + #gpio-cells = <2>; + interrupt-controller; + #interrupt-cells = <2>; + }; + timer2: timer@2000e000 { compatible = "snps,dw-apb-timer"; reg = <0x2000e000 0x100>; @@ -238,6 +250,18 @@ }; }; + gpio0: gpio@20034000 { + compatible = "rockchip,rk3066a-gpio-bank", "rockchip,gpio-bank"; + reg = <0x20034000 0x100>; + interrupts = ; + clocks = <&cru PCLK_GPIO0>; + gpio-controller; + gpio-ranges = <&pinctrl 0 0 32>; + #gpio-cells = <2>; + interrupt-controller; + #interrupt-cells = <2>; + }; + timer0: timer@20038000 { compatible = "snps,dw-apb-timer"; reg = <0x20038000 0x100>; @@ -254,6 +278,30 @@ clock-names = "timer", "pclk"; }; + gpio1: gpio@2003c000 { + compatible = "rockchip,rk3066a-gpio-bank", "rockchip,gpio-bank"; + reg = <0x2003c000 0x100>; + interrupts = ; + clocks = <&cru PCLK_GPIO1>; + gpio-controller; + gpio-ranges = <&pinctrl 0 32 32>; + #gpio-cells = <2>; + interrupt-controller; + #interrupt-cells = <2>; + }; + + gpio2: gpio@2003e000 { + compatible = "rockchip,rk3066a-gpio-bank", "rockchip,gpio-bank"; + reg = <0x2003e000 0x100>; + interrupts = ; + clocks = <&cru PCLK_GPIO2>; + gpio-controller; + gpio-ranges = <&pinctrl 0 64 32>; + #gpio-cells = <2>; + interrupt-controller; + #interrupt-cells = <2>; + }; + tsadc: tsadc@20060000 { compatible = "rockchip,rk3066-tsadc"; reg = <0x20060000 0x100>; @@ -266,96 +314,33 @@ status = "disabled"; }; + gpio3: gpio@20080000 { + compatible = "rockchip,rk3066a-gpio-bank", "rockchip,gpio-bank"; + reg = <0x20080000 0x100>; + interrupts = ; + clocks = <&cru PCLK_GPIO3>; + gpio-controller; + gpio-ranges = <&pinctrl 0 96 32>; + #gpio-cells = <2>; + interrupt-controller; + #interrupt-cells = <2>; + }; + + gpio4: gpio@20084000 { + compatible = "rockchip,rk3066a-gpio-bank", "rockchip,gpio-bank"; + reg = <0x20084000 0x100>; + interrupts = ; + clocks = <&cru PCLK_GPIO4>; + gpio-controller; + gpio-ranges = <&pinctrl 0 128 32>; + #gpio-cells = <2>; + interrupt-controller; + #interrupt-cells = <2>; + }; + pinctrl: pinctrl { compatible = "rockchip,rk3066a-pinctrl"; rockchip,grf = <&grf>; - #address-cells = <1>; - #size-cells = <1>; - ranges; - - gpio0: gpio@20034000 { - compatible = "rockchip,rk3066a-gpio-bank", "rockchip,gpio-bank"; - reg = <0x20034000 0x100>; - interrupts = ; - clocks = <&cru PCLK_GPIO0>; - - gpio-controller; - gpio-ranges = <&pinctrl 0 0 32>; - #gpio-cells = <2>; - - interrupt-controller; - #interrupt-cells = <2>; - }; - - gpio1: gpio@2003c000 { - compatible = "rockchip,rk3066a-gpio-bank", "rockchip,gpio-bank"; - reg = <0x2003c000 0x100>; - interrupts = ; - clocks = <&cru PCLK_GPIO1>; - - gpio-controller; - gpio-ranges = <&pinctrl 0 32 32>; - #gpio-cells = <2>; - - interrupt-controller; - #interrupt-cells = <2>; - }; - - gpio2: gpio@2003e000 { - compatible = "rockchip,rk3066a-gpio-bank", "rockchip,gpio-bank"; - reg = <0x2003e000 0x100>; - interrupts = ; - clocks = <&cru PCLK_GPIO2>; - - gpio-controller; - gpio-ranges = <&pinctrl 0 64 32>; - #gpio-cells = <2>; - - interrupt-controller; - #interrupt-cells = <2>; - }; - - gpio3: gpio@20080000 { - compatible = "rockchip,rk3066a-gpio-bank", "rockchip,gpio-bank"; - reg = <0x20080000 0x100>; - interrupts = ; - clocks = <&cru PCLK_GPIO3>; - - gpio-controller; - gpio-ranges = <&pinctrl 0 96 32>; - #gpio-cells = <2>; - - interrupt-controller; - #interrupt-cells = <2>; - }; - - gpio4: gpio@20084000 { - compatible = "rockchip,rk3066a-gpio-bank", "rockchip,gpio-bank"; - reg = <0x20084000 0x100>; - interrupts = ; - clocks = <&cru PCLK_GPIO4>; - - gpio-controller; - gpio-ranges = <&pinctrl 0 128 32>; - #gpio-cells = <2>; - - interrupt-controller; - #interrupt-cells = <2>; - }; - - gpio6: gpio@2000a000 { - compatible = "rockchip,rk3066a-gpio-bank", "rockchip,gpio-bank"; - reg = <0x2000a000 0x100>; - interrupts = ; - clocks = <&cru PCLK_GPIO6>; - - gpio-controller; - gpio-ranges = <&pinctrl 0 192 32>; - #gpio-cells = <2>; - - interrupt-controller; - #interrupt-cells = <2>; - }; pcfg_pull_default: pcfg-pull-default { bias-pull-pin-default;