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Tue, 27 Aug 2024 10:02:35 -0700 From: Nicolin Chen To: , , CC: , , , , , , , , , , , , , , , , Subject: [PATCH v1 09/10] iommufd/selftest: Add EVENT_VIRQ test coverage Date: Tue, 27 Aug 2024 10:02:11 -0700 Message-ID: <0320b797787b8c314171b915660e6366d92da3bf.1724777091.git.nicolinc@nvidia.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: References: MIME-Version: 1.0 X-NV-OnPremToCloud: ExternallySecured X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: DS3PEPF000099D5:EE_|CYYPR12MB8989:EE_ X-MS-Office365-Filtering-Correlation-Id: 61852039-ad32-494a-faf2-08dcc6ba18a3 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|1800799024|82310400026|36860700013|7416014|376014; X-Microsoft-Antispam-Message-Info: M+0+Dn+T7/DD1x8hOL7GhbLNSjOj4c4H5mtsO25a6TFYgsH2pZ4QzfGXpHyPkMYUyJnE2HM8GJ3e9ifsFzjbm8g97xUKUBi2jjN5d15Hw1c2UBV7qav+PVF9ZFAKbmQv7J+QZWkzJDL1RVASo4HE3rToxvhCtebmJ1EbOGedpMkUB6YO0/Yh0rXPbfLEQsYbeKhHOBumf57nVteoSZbk8eU4yN7CjvaWPVeJtQVEPvIdoTSU6eQkbsEuIBKh7MUMVElMbGMxZPJdh1jQiITMyJcrEPd4X5gvW7efF3O+DHD9r6kMtBYwKQ3c4/MIfT14H8OIdYWvXd2G09oi7BxyveAvrf4vPzsYArPV0OXQEGgkQfqacXCYX1vKGtywMi6RGeam8QmyLy2O9NIBjwYrTWYL5AUnGUgaL6G6khS8Ntg8rY5ytt9ltTWtioFqSn0E19IGexJFOUvILC8VDravGLm/qP+JNIzWf/jDqeZWQSLJ8oxrDTEsmHjyL6HthuCF2oFflZDNFLaHUThUoCfH2/1Nm270AqsSwzU2ZxC/yGcRyhICSTiVemB4i4j3UV328paEWicpuerZUkdDm9vW+JuNZqpm/6VvR/3d0t902ZXcBO+klhy1uo/0Y6AtD2+efBFUiyQ1OKcrYVQmVdgY4R3muVzy2c6c5PmqJRaGBd2Tsenvr9TZ+CftVYWUeZfOc/BF2zRMYHyV+MPrjrJaF5VWWI/Oa3kvdrMkUfnVC4DgA+fiuNkMdAsmALrJQ2Z4Lu4gI8EOTEX5li5FTEWKSEiEXsyJE0ccOGUeHliRBXbYfp0fd95vSB+lcpsHSllGYBfVifOT3VbjFqS9WZ+K+dyj07+bd/ezDz2wBkzIvyFbTyUzP9KbjwXRpf6tEMA/ZKM48hYC1nYlxc1bsNd7fwMT9HhsFY4RILJpPMzJCi2UeyUPxl6Si6a5yT8rnrirsELYwhtvSw945M7sQEks5s6TWvAaSbqVUNqAG025L/rkPoDlS8MWVYb4x9X6QualtzHZFc4tuwDHRTAgXuLD8x7tz6ieb7pmszgCxQ9CU7+0DQ0n/kBzWyl6UaSeDifjl48Pn+reib04upw0Ry69hnGSb5iFfu5gY84POMINvnWRPpcUhBhC0B4cEQetj4sDSOtO8cYYPHs2eciPJ+D+OpttJcAMWA1IdtxLEHoxQt7gdDC8IkMcuKuwJSAX7ltf56DjhzHb6/XxglKXZnd6Ng+ltJOpdccU8nA+BccIbCIPkW+Uc7Xzj0r5FhLVz0B6ce9k4e67Mnyb0QpzeKYupsc3nlEPOGyJj3AReKsYIxHJmSe+VFU0xxQ758hlogbvMMogFENruOOVQQI49g5bGGMDwKwvPioQt8P0mhqoyX3TlXfH4K3L9qjQuz+tNkwJb/yBogj7JDzQAOJFSsZvNmTgcf+IM85WoG/VUOCiLeiRi29d/RxToVithrE1mQLO X-Forefront-Antispam-Report: CIP:216.228.117.160;CTRY:US;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:mail.nvidia.com;PTR:dc6edge1.nvidia.com;CAT:NONE;SFS:(13230040)(1800799024)(82310400026)(36860700013)(7416014)(376014);DIR:OUT;SFP:1101; X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 27 Aug 2024 17:02:55.7821 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 61852039-ad32-494a-faf2-08dcc6ba18a3 X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a;Ip=[216.228.117.160];Helo=[mail.nvidia.com] X-MS-Exchange-CrossTenant-AuthSource: DS3PEPF000099D5.namprd04.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: CYYPR12MB8989 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20240827_100304_445432_C27B74F9 X-CRM114-Status: GOOD ( 14.32 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Trigger an IRQ giving an idev ID, to test the loopback whether receiving or not the vdev_id that was set to the idev by the line above. Signed-off-by: Nicolin Chen --- tools/testing/selftests/iommu/iommufd.c | 11 ++++ tools/testing/selftests/iommu/iommufd_utils.h | 64 +++++++++++++++++++ 2 files changed, 75 insertions(+) diff --git a/tools/testing/selftests/iommu/iommufd.c b/tools/testing/selftests/iommu/iommufd.c index 6f1014cc208b..11208f53fdce 100644 --- a/tools/testing/selftests/iommu/iommufd.c +++ b/tools/testing/selftests/iommu/iommufd.c @@ -564,6 +564,8 @@ TEST_F(iommufd_ioas, viommu_default) uint32_t nested_hwpt_id = 0, hwpt_id = 0; uint32_t dev_id = self->device_id; uint32_t viommu_id = 0; + uint32_t virq_id; + uint32_t virq_fd; if (dev_id) { /* Negative test -- invalid hwpt */ @@ -595,16 +597,25 @@ TEST_F(iommufd_ioas, viommu_default) sizeof(data)); test_cmd_mock_domain_replace(self->stdev_id, nested_hwpt_id); + test_cmd_virq_alloc(viommu_id, IOMMU_VIRQ_TYPE_SELFTEST, + &virq_id, &virq_fd); + test_err_virq_alloc(EEXIST, viommu_id, IOMMU_VIRQ_TYPE_SELFTEST, + &virq_id, &virq_fd); + /* Set vdev_id to 0x99, unset it, and set to 0x88 */ test_cmd_viommu_set_vdev_id(viommu_id, dev_id, 0x99); + test_cmd_trigger_virq(dev_id, virq_fd, 0x99); test_err_viommu_set_vdev_id(EEXIST, viommu_id, dev_id, 0x99); test_err_viommu_unset_vdev_id(EINVAL, viommu_id, dev_id, 0x88); test_cmd_viommu_unset_vdev_id(viommu_id, dev_id, 0x99); test_cmd_viommu_set_vdev_id(viommu_id, dev_id, 0x88); + test_cmd_trigger_virq(dev_id, virq_fd, 0x88); + close(virq_fd); test_cmd_mock_domain_replace(self->stdev_id, hwpt_id); test_ioctl_destroy(nested_hwpt_id); test_cmd_mock_domain_replace(self->stdev_id, self->ioas_id); + test_ioctl_destroy(virq_id); test_ioctl_destroy(viommu_id); test_ioctl_destroy(hwpt_id); } else { diff --git a/tools/testing/selftests/iommu/iommufd_utils.h b/tools/testing/selftests/iommu/iommufd_utils.h index 0a81827b903f..9fec38f45e0e 100644 --- a/tools/testing/selftests/iommu/iommufd_utils.h +++ b/tools/testing/selftests/iommu/iommufd_utils.h @@ -9,6 +9,7 @@ #include #include #include +#include #include "../kselftest_harness.h" #include "../../../../drivers/iommu/iommufd/iommufd_test.h" @@ -888,3 +889,66 @@ static int _test_cmd_viommu_unset_vdev_id(int fd, __u32 viommu_id, EXPECT_ERRNO(_errno, \ _test_cmd_viommu_unset_vdev_id(self->fd, viommu_id, \ idev_id, vdev_id)) + +static int _test_ioctl_virq_alloc(int fd, __u32 viommu_id, __u32 type, + __u32 *virq_id, __u32 *virq_fd) +{ + struct iommu_virq_alloc cmd = { + .size = sizeof(cmd), + .type = type, + .viommu_id = viommu_id, + }; + int ret; + + ret = ioctl(fd, IOMMU_VIRQ_ALLOC, &cmd); + if (ret) + return ret; + if (virq_id) + *virq_id = cmd.out_virq_id; + if (virq_fd) + *virq_fd = cmd.out_virq_fd; + return 0; +} + +#define test_cmd_virq_alloc(viommu_id, type, virq_id, virq_fd) \ + ASSERT_EQ(0, _test_ioctl_virq_alloc(self->fd, viommu_id, type, \ + virq_id, virq_fd)) +#define test_err_virq_alloc(_errno, viommu_id, type, virq_id, virq_fd) \ + EXPECT_ERRNO(_errno, \ + _test_ioctl_virq_alloc(self->fd, viommu_id, type, \ + virq_id, virq_fd)) + +static int _test_cmd_trigger_virq(int fd, __u32 dev_id, + __u32 event_fd, __u32 vdev_id) +{ + struct iommu_test_cmd trigger_virq_cmd = { + .size = sizeof(trigger_virq_cmd), + .op = IOMMU_TEST_OP_TRIGGER_VIRQ, + .trigger_virq = { + .dev_id = dev_id, + }, + }; + struct pollfd pollfd = { .fd = event_fd, .events = POLLIN }; + struct iommu_viommu_irq_selftest irq; + ssize_t bytes; + int ret; + + ret = ioctl(fd, _IOMMU_TEST_CMD(IOMMU_TEST_OP_TRIGGER_VIRQ), + &trigger_virq_cmd); + if (ret) + return ret; + + ret = poll(&pollfd, 1, 1000); + if (ret < 0) + return ret; + + bytes = read(event_fd, &irq, sizeof(irq)); + if (bytes <= 0) + return -EIO; + + return irq.vdev_id == vdev_id ? 0 : -EINVAL; +} + +#define test_cmd_trigger_virq(dev_id, event_fd, vdev_id) \ + ASSERT_EQ(0, _test_cmd_trigger_virq(self->fd, dev_id, \ + event_fd, vdev_id))