| Message ID | 063a50cff2942c96dc6f24d4f8c8a854a4a6cc30.1497886335.git.robin.murphy@arm.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
On Mon, Jun 19, 2017 at 04:41:56PM +0100, Robin Murphy wrote: > Revision C of IORT now allows us to identify ARM MMU-401 and the Cavium > ThunderX implementation. Wire them up so that we can probe these models > once firmware starts using the new codes in place of generic ones, and > so that the appropriate features and quirks get enabled when we do. > > For the sake of backports and mitigating sychronisation problems with > the ACPICA headers, we'll carry a backup copy of the new definitions > locally for the short term to make life simpler. > > CC: stable@vger.kernel.org # 4.10 > Acked-by: Robert Richter <rrichter@cavium.com> > Tested-by: Robert Richter <rrichter@cavium.com> > Signed-off-by: Robin Murphy <robin.murphy@arm.com> > --- > > v3: The patch that actually landed in ACPICA was slightly tweaked for > self-consistency, so s/CAVIUM_SMMUV2/CAVIUM_THUNDERX/ to match. > > drivers/iommu/arm-smmu.c | 16 ++++++++++++++++ > 1 file changed, 16 insertions(+) I've picked this one up. Will
diff --git a/drivers/iommu/arm-smmu.c b/drivers/iommu/arm-smmu.c index 7ec30b08b3bd..7ecd1a0b8419 100644 --- a/drivers/iommu/arm-smmu.c +++ b/drivers/iommu/arm-smmu.c @@ -312,6 +312,14 @@ enum arm_smmu_implementation { CAVIUM_SMMUV2, }; +/* Until ACPICA headers cover IORT rev. C */ +#ifndef ACPI_IORT_SMMU_CORELINK_MMU401 +#define ACPI_IORT_SMMU_CORELINK_MMU401 0x4 +#endif +#ifndef ACPI_IORT_SMMU_CAVIUM_THUNDERX +#define ACPI_IORT_SMMU_CAVIUM_THUNDERX 0x5 +#endif + struct arm_smmu_s2cr { struct iommu_group *group; int count; @@ -2073,6 +2081,10 @@ static int acpi_smmu_get_data(u32 model, struct arm_smmu_device *smmu) smmu->version = ARM_SMMU_V1; smmu->model = GENERIC_SMMU; break; + case ACPI_IORT_SMMU_CORELINK_MMU401: + smmu->version = ARM_SMMU_V1_64K; + smmu->model = GENERIC_SMMU; + break; case ACPI_IORT_SMMU_V2: smmu->version = ARM_SMMU_V2; smmu->model = GENERIC_SMMU; @@ -2081,6 +2093,10 @@ static int acpi_smmu_get_data(u32 model, struct arm_smmu_device *smmu) smmu->version = ARM_SMMU_V2; smmu->model = ARM_MMU500; break; + case ACPI_IORT_SMMU_CAVIUM_THUNDERX: + smmu->version = ARM_SMMU_V2; + smmu->model = CAVIUM_SMMUV2; + break; default: ret = -ENODEV; }