From patchwork Tue Aug 20 03:57:47 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dragan Simic X-Patchwork-Id: 13769292 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 3AE0FC3DA4A for ; Tue, 20 Aug 2024 03:59:00 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender:List-Subscribe:List-Help :List-Post:List-Archive:List-Unsubscribe:List-Id:Content-Transfer-Encoding: MIME-Version:Message-Id:Date:Subject:Cc:To:From:Reply-To:Content-Type: Content-ID:Content-Description:Resent-Date:Resent-From:Resent-Sender: Resent-To:Resent-Cc:Resent-Message-ID:In-Reply-To:References:List-Owner; bh=6MSYoUFUlL53+l626iAN1HyCTu4sv54B1LG1QwOvN8A=; b=ZekBWcQ4rf8iuTEYZH+mkdUPNS jeBpDbdZQ8V3qhUn3bPDouIyFyxjF+9yZ/AZarVyZkVXTWGWmLMH8JKqaGn69wo80r9eNmneGbKo3 svwp8h3nV6nzrmi765S/v5jtsn+Hpk8Z/LGb7wGI/RmU7M6Tkh40+28NJe25KOdir3408V5OCqkOL QnEuxrXfFMqamszT3aLwIgI+z/ho5i5v+WMhU1Agh+NkXVJvjjXCTM8IABncG8BcsIZPzbZHcstJb PtCH3BgOnsNkdxd4/1PPuOJpuy60cLVyLm7VVmd8cYAXGZx01AuorUp7MShBBl99L2fy6FSsNgvHm FoeQcZTg==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.97.1 #2 (Red Hat Linux)) id 1sgG18-00000003iYB-1pCa; Tue, 20 Aug 2024 03:58:46 +0000 Received: from mail.manjaro.org ([2a01:4f8:c0c:51f3::1]) by bombadil.infradead.org with esmtps (Exim 4.97.1 #2 (Red Hat Linux)) id 1sgG0S-00000003iRH-0Fpm for linux-arm-kernel@lists.infradead.org; Tue, 20 Aug 2024 03:58:05 +0000 From: Dragan Simic DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=manjaro.org; s=2021; t=1724126281; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version: content-transfer-encoding:content-transfer-encoding; bh=6MSYoUFUlL53+l626iAN1HyCTu4sv54B1LG1QwOvN8A=; b=XRXkUPy3TxEws0/uYt+fcDoMzNwxiFyLl66YfDYmFAb/pKznWzNjQ2LAwdldDWZQzcvCpU NHWv08LKEhI2yRKhKvXixkOPaAwVV6UN1xuaavfeOCcULovhPItbYWzshpfamyj3xlB4Bu dEyDcQcz1WaLm9KrunDD7Zd2G15GgnH2qBymHnPw6cU3XemvFpHBp/Y8LpBKpZ40Bf8htF tF1v73qMC3y/GkFH/2wOO6BU/ns2+5m7eBQdGroxdQ4//vcnCV2vI+l7E1RkZ2xtNn4Gue 5xdUBbR2M4wsZJeopKm5kRCdCBpqTL6DX1OcD2lSpp3vCVHQxT+Hd7O9pOIxnA== To: linux-sunxi@lists.linux.dev Cc: wens@csie.org, jernej.skrabec@gmail.com, samuel@sholland.org, linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org, robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org, linux-kernel@vger.kernel.org, uwu@icenowy.me, wenst@chromium.org, broonie@kernel.org, daniel.lezcano@linaro.org Subject: [PATCH v2] arm64: dts: allwinner: a64: Add GPU thermal trips to the SoC dtsi Date: Tue, 20 Aug 2024 05:57:47 +0200 Message-Id: <0a6110a7b27a050bd58ab3663087eecd8e873ac0.1724126053.git.dsimic@manjaro.org> MIME-Version: 1.0 Authentication-Results: ORIGINATING; auth=pass smtp.auth=dsimic@manjaro.org smtp.mailfrom=dsimic@manjaro.org X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20240819_205804_293607_54A3A59E X-CRM114-Status: GOOD ( 12.72 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Add thermal trips for the two GPU thermal sensors found in the Allwinner A64. There's only one GPU OPP defined since the commit 1428f0c19f9c ("arm64: dts: allwinner: a64: Run GPU at 432 MHz"), so defining only the critical thermal trips makes sense for the A64's two GPU thermal zones. Having these critical thermal trips defined ensures that no hot spots develop inside the SoC die that exceed the maximum junction temperature. That might have been possible before, although quite unlikely, because the CPU and GPU portions of the SoC are packed closely inside the SoC, so the overheating GPU would inevitably result in the heat soaking into the CPU portion of the SoC, causing the CPU thermal sensor to return high readings and trigger the CPU critical thermal trips. However, it's better not to rely on the heat soak and have the critical GPU thermal trips properly defined instead. Signed-off-by: Dragan Simic Tested-by: Norayr Chilingarian --- Notes: Changes in v2: - Added "a64:" at the end of the patch subject prefix and adjusted the patch subject a bit, to match the usual prefix better - Dropped the removal of potentially redundant comments that describe the units, as suggested by Icenowy [1] and Chen-Yu [2] Link to v1: https://lore.kernel.org/linux-sunxi/a17e0df64c5b976b47f19c5a29c02759cd9e5b8c.1723427375.git.dsimic@manjaro.org/T/#u [1] https://lore.kernel.org/linux-sunxi/24406e36f6facd93e798113303e22925b0a2dcc1.camel@icenowy.me/ [2] https://lore.kernel.org/linux-sunxi/662f2332efb1d6c21e722066562a72b9@manjaro.org/T/#mdd7b18962c1ae339141061af51b89cd68bc04d50 arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi | 16 ++++++++++++++++ 1 file changed, 16 insertions(+) diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi index e868ca5ae753..a5c3920e0f04 100644 --- a/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi +++ b/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi @@ -263,13 +263,29 @@ gpu0_thermal: gpu0-thermal { polling-delay-passive = <0>; polling-delay = <0>; thermal-sensors = <&ths 1>; + + trips { + gpu0_crit: gpu0-crit { + temperature = <110000>; + hysteresis = <2000>; + type = "critical"; + }; + }; }; gpu1_thermal: gpu1-thermal { /* milliseconds */ polling-delay-passive = <0>; polling-delay = <0>; thermal-sensors = <&ths 2>; + + trips { + gpu1_crit: gpu1-crit { + temperature = <110000>; + hysteresis = <2000>; + type = "critical"; + }; + }; }; };