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Mon, 29 Apr 2024 21:44:06 -0700 From: Nicolin Chen To: , CC: , , , , , , , , Subject: [PATCH v6 1/6] iommu/arm-smmu-v3: Pass in cmdq pointer to arm_smmu_cmdq_issue_cmdlist() Date: Mon, 29 Apr 2024 21:43:44 -0700 Message-ID: <0acb55059f7212abdf4277a81e2f033127072bc9.1714451595.git.nicolinc@nvidia.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: References: MIME-Version: 1.0 X-NV-OnPremToCloud: ExternallySecured X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: SA2PEPF0000150A:EE_|BY5PR12MB4276:EE_ X-MS-Office365-Filtering-Correlation-Id: 8a0dd7fb-52a8-4faf-9a79-08dc68d02d33 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230031|36860700004|1800799015|376005|82310400014; X-Microsoft-Antispam-Message-Info: Rx4WTYNxue3lIsV7X/f5SBQd6PAJ+lmnglWm/n4ak/FUvNk6fVQAyNAPTk7o6Mc4H1wlM/0ENikf1eG6q8/0+/gR0Xa+AQAbSE7AUWweEVr5SluXbDbeZkT0XdGG5eCndsKemYZNcUUTW5lmdh6X5FS/XhxFLJUlPB7gEwk3PUR3FSL5pjvIS2Bj+wAkMITA753HIsoL10Hi1ZAAyAsXPDO21tyz5mksyEjwxESVjwdIp204WFsIM4qitymRcrwIUx6q970GyFMB8khY0LMrF7RA41TSFL4Tz6Y1Ft2XX7brESPJczz/MYe1fQLBfYhkqD2YDDIzcstiCrvy3bZc9Ln1hGVwenaU7JAWdlq0vv5JYEaORMaWsyHDchU4OmwN3zwtPrE20CIW+DPf64e68Xihn3h30rPossZy9QxF7u8sZ4qDy1WSbBD4QZgIYAETC9TONuHtYrMOia3EnEjo+N4zea4lF6CAQhH+5UighFi6MGJH8mfJhxHc5NYYonfPSBZtnHlRouUrEGqqEXoSKDX66yq16LqL75NSYWviHkLgJMwiKLWOH3prDjYDQV8IsODIicAw4uj/zK5IRCTauZVIlaoX6Su9CtUqEgcrmUzNHlrPI+/SARfrJNd+AlkXVA7l09jpUtTELyhwtyRSFk9G/JPwv9jZzbNsj/UzpWrmEcANZQLNOvW7dniafAwL+czlgZ9j5RrYodeiQxX9kynqZsZQZ9YNDR3l4asAl4PmjanxCGAn7xCN15oxSi8In/mo6uSNIdmfgiLPCFANi4EyFJ59rtMQo/nv7UI+pmHHZNcMrOOB4HEik1U4qhXG2LVAq585NITvc0/1Yql5K8Y/9SiOOcKDXHS+qy4oYtTdsd//IsSF/VZmPDq6p9o7gu035Q+C6fEz7+lctUeMGEgjN/9mCs7Fy7u4LISteROn/g/WqSfGmJpJm0WOGb3IgrJtsDTaialzisTVS692NzfH4CAUot3Z7lv99EVbCcz5/nHp3uDsge3j9XpuFUb61fx+mZucn4tM2r5VDqi7CzqbqRgDvSlohhvLD6LO5icvkDOK7RaYeJrxZAU4ZXiRIcOmTjVy3aTI7d1J0JlWFsYln+mKV0jZWNrC5tjC6rYb9wHfkohwdNRCW2d/4AAk85jkAG6d9GercwFv3Jwij9uDkgTruwZ+ntg+adjV1wTIRDqzqwIX1caN4cNaNTIfthWNThh2a/H7V6860tpj4AYcflnSBrWOpJk9fRNMeJqCuSXI1ISyPLShmqot61LJ7OYlTTJfzrUPu1Mc3SlDurwhG8zY47vR/TS+MJHyXoRSgamYp3FtTpKhdWw1DBE3YS+TXMWlwP9ukE8nzx4a2o5xxaYN7hApu3mEFpJxTbtfyCJHwcUon8z4nI9yta5e X-Forefront-Antispam-Report: CIP:216.228.118.233;CTRY:US;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:mail.nvidia.com;PTR:dc7edge2.nvidia.com;CAT:NONE;SFS:(13230031)(36860700004)(1800799015)(376005)(82310400014);DIR:OUT;SFP:1101; X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 30 Apr 2024 04:44:09.9360 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 8a0dd7fb-52a8-4faf-9a79-08dc68d02d33 X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a;Ip=[216.228.118.233];Helo=[mail.nvidia.com] X-MS-Exchange-CrossTenant-AuthSource: SA2PEPF0000150A.namprd04.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: BY5PR12MB4276 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20240429_214422_441324_F2E6F4F6 X-CRM114-Status: GOOD ( 12.90 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org The driver currently calls arm_smmu_get_cmdq() helper in different places, although they are all called from the arm_smmu_cmdq_issue_cmdlist(). Allow to pass in the cmdq pointer, instead of calling arm_smmu_get_cmdq() every time. This will also help CMDQV extension in NVIDIA Tegra241 SoC, as its driver will maintain its own cmdq pointers, then need to redirect arm_smmu->cmdq to one of its vcmdqs upon seeing a supported command. Signed-off-by: Nicolin Chen Reviewed-by: Jason Gunthorpe --- drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c | 15 ++++++++------- 1 file changed, 8 insertions(+), 7 deletions(-) diff --git a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c index 41f93c3ab160..6a7e6b1ba5f7 100644 --- a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c +++ b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c @@ -596,11 +596,11 @@ static void arm_smmu_cmdq_poll_valid_map(struct arm_smmu_cmdq *cmdq, /* Wait for the command queue to become non-full */ static int arm_smmu_cmdq_poll_until_not_full(struct arm_smmu_device *smmu, + struct arm_smmu_cmdq *cmdq, struct arm_smmu_ll_queue *llq) { unsigned long flags; struct arm_smmu_queue_poll qp; - struct arm_smmu_cmdq *cmdq = arm_smmu_get_cmdq(smmu); int ret = 0; /* @@ -631,11 +631,11 @@ static int arm_smmu_cmdq_poll_until_not_full(struct arm_smmu_device *smmu, * Must be called with the cmdq lock held in some capacity. */ static int __arm_smmu_cmdq_poll_until_msi(struct arm_smmu_device *smmu, + struct arm_smmu_cmdq *cmdq, struct arm_smmu_ll_queue *llq) { int ret = 0; struct arm_smmu_queue_poll qp; - struct arm_smmu_cmdq *cmdq = arm_smmu_get_cmdq(smmu); u32 *cmd = (u32 *)(Q_ENT(&cmdq->q, llq->prod)); queue_poll_init(smmu, &qp); @@ -655,10 +655,10 @@ static int __arm_smmu_cmdq_poll_until_msi(struct arm_smmu_device *smmu, * Must be called with the cmdq lock held in some capacity. */ static int __arm_smmu_cmdq_poll_until_consumed(struct arm_smmu_device *smmu, + struct arm_smmu_cmdq *cmdq, struct arm_smmu_ll_queue *llq) { struct arm_smmu_queue_poll qp; - struct arm_smmu_cmdq *cmdq = arm_smmu_get_cmdq(smmu); u32 prod = llq->prod; int ret = 0; @@ -705,12 +705,13 @@ static int __arm_smmu_cmdq_poll_until_consumed(struct arm_smmu_device *smmu, } static int arm_smmu_cmdq_poll_until_sync(struct arm_smmu_device *smmu, + struct arm_smmu_cmdq *cmdq, struct arm_smmu_ll_queue *llq) { if (smmu->options & ARM_SMMU_OPT_MSIPOLL) - return __arm_smmu_cmdq_poll_until_msi(smmu, llq); + return __arm_smmu_cmdq_poll_until_msi(smmu, cmdq, llq); - return __arm_smmu_cmdq_poll_until_consumed(smmu, llq); + return __arm_smmu_cmdq_poll_until_consumed(smmu, cmdq, llq); } static void arm_smmu_cmdq_write_entries(struct arm_smmu_cmdq *cmdq, u64 *cmds, @@ -767,7 +768,7 @@ static int arm_smmu_cmdq_issue_cmdlist(struct arm_smmu_device *smmu, while (!queue_has_space(&llq, n + sync)) { local_irq_restore(flags); - if (arm_smmu_cmdq_poll_until_not_full(smmu, &llq)) + if (arm_smmu_cmdq_poll_until_not_full(smmu, cmdq, &llq)) dev_err_ratelimited(smmu->dev, "CMDQ timeout\n"); local_irq_save(flags); } @@ -843,7 +844,7 @@ static int arm_smmu_cmdq_issue_cmdlist(struct arm_smmu_device *smmu, /* 5. If we are inserting a CMD_SYNC, we must wait for it to complete */ if (sync) { llq.prod = queue_inc_prod_n(&llq, n); - ret = arm_smmu_cmdq_poll_until_sync(smmu, &llq); + ret = arm_smmu_cmdq_poll_until_sync(smmu, cmdq, &llq); if (ret) { dev_err_ratelimited(smmu->dev, "CMD_SYNC timeout at 0x%08x [hwprod 0x%08x, hwcons 0x%08x]\n",