| Message ID | 0d7bc6062323688d22b7873e2a1fa354ab42a0af.1543321707.git-series.maxime.ripard@bootlin.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | ARM: dts: sunxi: Cleanup DTC warnings | expand |
On Tue, Nov 27, 2018 at 8:47 PM Maxime Ripard <maxime.ripard@bootlin.com> wrote: > > Now that all the SoCs using the tablet reference design DTSI are using the > same pinctrl naming scheme, we can move back the pinctrl phandles to the > main DTSI. > > Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com> > --- > arch/arm/boot/dts/sun5i-reference-design-tablet.dtsi | 8 -------- > arch/arm/boot/dts/sun8i-reference-design-tablet.dtsi | 9 --------- > arch/arm/boot/dts/sunxi-reference-design-tablet.dtsi | 6 +++--- > 3 files changed, 3 insertions(+), 20 deletions(-) [...] > diff --git a/arch/arm/boot/dts/sunxi-reference-design-tablet.dtsi b/arch/arm/boot/dts/sunxi-reference-design-tablet.dtsi > index 00dc6623f30f..117198c52e1f 100644 > --- a/arch/arm/boot/dts/sunxi-reference-design-tablet.dtsi > +++ b/arch/arm/boot/dts/sunxi-reference-design-tablet.dtsi > @@ -46,13 +46,13 @@ > > &i2c0 { > pinctrl-names = "default"; > - pinctrl-0 = <&i2c0_pins_a>; > + pinctrl-0 = <&i2c0_pins>; > status = "okay"; > }; > > &i2c1 { > pinctrl-names = "default"; > - pinctrl-0 = <&i2c1_pins_a>; > + pinctrl-0 = <&i2c1_pins>; I assume a build break was avoided because we were overriding these? Acked-by: Chen-Yu Tsai <wens@csie.org> > status = "okay"; > }; > > @@ -77,6 +77,6 @@ > > &pwm { > pinctrl-names = "default"; > - pinctrl-0 = <&pwm0_pins>; > + pinctrl-0 = <&pwm0_pin>; > status = "okay"; > }; > -- > git-series 0.9.1
On Wed, Nov 28, 2018 at 08:41:46PM +0800, Chen-Yu Tsai wrote: > On Tue, Nov 27, 2018 at 8:47 PM Maxime Ripard <maxime.ripard@bootlin.com> wrote: > > > > Now that all the SoCs using the tablet reference design DTSI are using the > > same pinctrl naming scheme, we can move back the pinctrl phandles to the > > main DTSI. > > > > Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com> > > --- > > arch/arm/boot/dts/sun5i-reference-design-tablet.dtsi | 8 -------- > > arch/arm/boot/dts/sun8i-reference-design-tablet.dtsi | 9 --------- > > arch/arm/boot/dts/sunxi-reference-design-tablet.dtsi | 6 +++--- > > 3 files changed, 3 insertions(+), 20 deletions(-) > > [...] > > > diff --git a/arch/arm/boot/dts/sunxi-reference-design-tablet.dtsi b/arch/arm/boot/dts/sunxi-reference-design-tablet.dtsi > > index 00dc6623f30f..117198c52e1f 100644 > > --- a/arch/arm/boot/dts/sunxi-reference-design-tablet.dtsi > > +++ b/arch/arm/boot/dts/sunxi-reference-design-tablet.dtsi > > @@ -46,13 +46,13 @@ > > > > &i2c0 { > > pinctrl-names = "default"; > > - pinctrl-0 = <&i2c0_pins_a>; > > + pinctrl-0 = <&i2c0_pins>; > > status = "okay"; > > }; > > > > &i2c1 { > > pinctrl-names = "default"; > > - pinctrl-0 = <&i2c1_pins_a>; > > + pinctrl-0 = <&i2c1_pins>; > > I assume a build break was avoided because we were overriding these? Yep, exactly. > Acked-by: Chen-Yu Tsai <wens@csie.org> Thanks! Maxime
diff --git a/arch/arm/boot/dts/sun5i-reference-design-tablet.dtsi b/arch/arm/boot/dts/sun5i-reference-design-tablet.dtsi index b046436ff773..6202aabedbfe 100644 --- a/arch/arm/boot/dts/sun5i-reference-design-tablet.dtsi +++ b/arch/arm/boot/dts/sun5i-reference-design-tablet.dtsi @@ -76,8 +76,6 @@ }; &i2c0 { - pinctrl-0 = <&i2c0_pins>; - axp209: pmic@34 { reg = <0x34>; interrupts = <0>; @@ -85,8 +83,6 @@ }; &i2c1 { - pinctrl-0 = <&i2c1_pins>; - /* * The gsl1680 is rated at 400KHz and it will not work reliable at * 100KHz, this has been confirmed on multiple different q8 tablets. @@ -150,10 +146,6 @@ }; }; -&pwm { - pinctrl-0 = <&pwm0_pin>; -}; - ®_dcdc2 { regulator-always-on; regulator-min-microvolt = <1000000>; diff --git a/arch/arm/boot/dts/sun8i-reference-design-tablet.dtsi b/arch/arm/boot/dts/sun8i-reference-design-tablet.dtsi index 787a3121e179..0111e6c6f177 100644 --- a/arch/arm/boot/dts/sun8i-reference-design-tablet.dtsi +++ b/arch/arm/boot/dts/sun8i-reference-design-tablet.dtsi @@ -62,7 +62,6 @@ }; &i2c0 { - pinctrl-0 = <&i2c0_pins>; /* * The gsl1680 is rated at 400KHz and it will not work reliable at * 100KHz, this has been confirmed on multiple different q8 tablets. @@ -80,10 +79,6 @@ }; }; -&i2c1 { - pinctrl-0 = <&i2c1_pins>; -}; - &mmc0 { pinctrl-names = "default"; pinctrl-0 = <&mmc0_pins>; @@ -101,10 +96,6 @@ }; }; -&pwm { - pinctrl-0 = <&pwm0_pin>; -}; - &r_rsb { status = "okay"; diff --git a/arch/arm/boot/dts/sunxi-reference-design-tablet.dtsi b/arch/arm/boot/dts/sunxi-reference-design-tablet.dtsi index 00dc6623f30f..117198c52e1f 100644 --- a/arch/arm/boot/dts/sunxi-reference-design-tablet.dtsi +++ b/arch/arm/boot/dts/sunxi-reference-design-tablet.dtsi @@ -46,13 +46,13 @@ &i2c0 { pinctrl-names = "default"; - pinctrl-0 = <&i2c0_pins_a>; + pinctrl-0 = <&i2c0_pins>; status = "okay"; }; &i2c1 { pinctrl-names = "default"; - pinctrl-0 = <&i2c1_pins_a>; + pinctrl-0 = <&i2c1_pins>; status = "okay"; }; @@ -77,6 +77,6 @@ &pwm { pinctrl-names = "default"; - pinctrl-0 = <&pwm0_pins>; + pinctrl-0 = <&pwm0_pin>; status = "okay"; };
Now that all the SoCs using the tablet reference design DTSI are using the same pinctrl naming scheme, we can move back the pinctrl phandles to the main DTSI. Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com> --- arch/arm/boot/dts/sun5i-reference-design-tablet.dtsi | 8 -------- arch/arm/boot/dts/sun8i-reference-design-tablet.dtsi | 9 --------- arch/arm/boot/dts/sunxi-reference-design-tablet.dtsi | 6 +++--- 3 files changed, 3 insertions(+), 20 deletions(-)