From patchwork Tue Jun 21 07:03:46 2011 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: p.paneri@samsung.com X-Patchwork-Id: 899902 Received: from merlin.infradead.org (merlin.infradead.org [205.233.59.134]) by demeter1.kernel.org (8.14.4/8.14.4) with ESMTP id p5L70fC4021227 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-SHA bits=256 verify=NO) for ; Tue, 21 Jun 2011 07:01:02 GMT Received: from canuck.infradead.org ([2001:4978:20e::1]) by merlin.infradead.org with esmtps (Exim 4.76 #1 (Red Hat Linux)) id 1QYuwp-0008KV-DS; Tue, 21 Jun 2011 07:00:31 +0000 Received: from localhost ([127.0.0.1] helo=canuck.infradead.org) by canuck.infradead.org with esmtp (Exim 4.76 #1 (Red Hat Linux)) id 1QYuwo-0007M7-PO; Tue, 21 Jun 2011 07:00:30 +0000 Received: from mailout1.samsung.com ([203.254.224.24]) by canuck.infradead.org with esmtp (Exim 4.76 #1 (Red Hat Linux)) id 1QYuvv-0007Bu-3x for linux-arm-kernel@lists.infradead.org; Tue, 21 Jun 2011 06:59:41 +0000 Received: from epcpsbgm2.samsung.com (mailout1.samsung.com [203.254.224.24]) by mailout1.samsung.com (Oracle Communications Messaging Exchange Server 7u4-19.01 64bit (built Sep 7 2010)) with ESMTP id <0LN4005M3OQ03QH0@mailout1.samsung.com> for linux-arm-kernel@lists.infradead.org; Tue, 21 Jun 2011 15:59:31 +0900 (KST) X-AuditID: cbfee61b-b7b2dae000007af9-f1-4e0041526548 Received: from epmmp1 ( [203.254.227.16]) by epcpsbgm2.samsung.com (MMPCPMTA) with SMTP id 52.C6.31481.251400E4; Tue, 21 Jun 2011 15:59:31 +0900 (KST) Received: from localhost.localdomain ([107.108.73.199]) by mmp1.samsung.com (iPlanet Messaging Server 5.2 Patch 2 (built Jul 14 2004)) with ESMTPA id <0LN40097UOQQD9@mmp1.samsung.com> for linux-arm-kernel@lists.infradead.org; Tue, 21 Jun 2011 15:59:30 +0900 (KST) Date: Tue, 21 Jun 2011 12:33:46 +0530 From: p.paneri@samsung.com Subject: [RFC][PATCH 4/5] ARM: S5P64x0: Adding OTG PHY control code In-reply-to: <1308639827-2121-1-git-send-email-p.paneri@samsung.com> To: linux-usb@vger.kernel.org Message-id: <1308639827-2121-5-git-send-email-p.paneri@samsung.com> X-Mailer: git-send-email 1.7.0.4 References: <1308639827-2121-1-git-send-email-p.paneri@samsung.com> X-Brightmail-Tracker: AAAAAA== X-CRM114-Version: 20090807-BlameThorstenAndJenny ( TRE 0.7.6 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20110621_025935_543311_62C6C375 X-CRM114-Status: GOOD ( 20.83 ) X-Spam-Score: -2.3 (--) X-Spam-Report: SpamAssassin version 3.3.1 on canuck.infradead.org summary: Content analysis details: (-2.3 points) pts rule name description ---- ---------------------- -------------------------------------------------- -2.3 RCVD_IN_DNSWL_MED RBL: Sender listed at http://www.dnswl.org/, medium trust [203.254.224.24 listed in list.dnswl.org] -0.0 T_RP_MATCHES_RCVD Envelope sender domain matches handover relay domain 0.0 RFC_ABUSE_POST Both abuse and postmaster missing on sender domain Cc: kgene.kim@samsung.com, tmarri@apm.com, balbi@ti.com, naushad@samsung.com, linux-samsung-soc@vger.kernel.org, thomas.ab@samsung.com, a.kesavan@samsung.com, linux-arm-kernel@lists.infradead.org X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.12 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: linux-arm-kernel-bounces@lists.infradead.org Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Greylist: IP, sender and recipient auto-whitelisted, not delayed by milter-greylist-4.2.6 (demeter1.kernel.org [140.211.167.41]); Tue, 21 Jun 2011 07:01:02 +0000 (UTC) From: Praveen Paneri A generic method to initialize and exit OTG PHY which can be used for all the samsung SoCs. OTG platdata structure added in platform to pass required platform specific functions and data to the driver. Signed-off-by: Praveen Paneri --- arch/arm/mach-s5p64x0/Makefile | 1 + arch/arm/mach-s5p64x0/include/mach/map.h | 4 + arch/arm/mach-s5p64x0/setup-otg-phy.c | 89 ++++++++++++++++++++++++++++++ arch/arm/plat-s5p/include/plat/otg.h | 29 ++++++++++ 4 files changed, 123 insertions(+), 0 deletions(-) create mode 100644 arch/arm/mach-s5p64x0/setup-otg-phy.c create mode 100644 arch/arm/plat-s5p/include/plat/otg.h diff --git a/arch/arm/mach-s5p64x0/Makefile b/arch/arm/mach-s5p64x0/Makefile index ae6bf6f..611fb3a 100644 --- a/arch/arm/mach-s5p64x0/Makefile +++ b/arch/arm/mach-s5p64x0/Makefile @@ -28,3 +28,4 @@ obj-y += dev-audio.o obj-$(CONFIG_S3C64XX_DEV_SPI) += dev-spi.o obj-$(CONFIG_S5P64X0_SETUP_I2C1) += setup-i2c1.o +obj-$(CONFIG_S3C_DEV_DWC_OTG) += setup-otg-phy.o diff --git a/arch/arm/mach-s5p64x0/include/mach/map.h b/arch/arm/mach-s5p64x0/include/mach/map.h index 95c9125..717c279 100644 --- a/arch/arm/mach-s5p64x0/include/mach/map.h +++ b/arch/arm/mach-s5p64x0/include/mach/map.h @@ -44,6 +44,8 @@ #define S5P64X0_PA_SPI1 0xEC500000 #define S5P64X0_PA_HSOTG 0xED100000 +#define S5P64X0_PA_USB_HSPHY 0xED200000 +#define S5P64X0_VA_USB_HSPHY S3C_ADDR_CPU(0x00100000) #define S5P64X0_PA_HSMMC(x) (0xED800000 + ((x) * 0x100000)) @@ -71,6 +73,8 @@ #define S5P_PA_TIMER S5P64X0_PA_TIMER #define SAMSUNG_PA_ADC S5P64X0_PA_ADC +#define S3C_PA_USB_HSOTG S5P64X0_PA_HSOTG +#define S3C_VA_USB_HSPHY S5P64X0_VA_USB_HSPHY /* UART */ diff --git a/arch/arm/mach-s5p64x0/setup-otg-phy.c b/arch/arm/mach-s5p64x0/setup-otg-phy.c new file mode 100644 index 0000000..c351554 --- /dev/null +++ b/arch/arm/mach-s5p64x0/setup-otg-phy.c @@ -0,0 +1,89 @@ +/* + * Copyright (C) 2011 Samsung Electronics Co.Ltd + * Author: Praveen Paneri + * based on arch/arm/mach-exynos4/setup-usb-phy.c + * written by Joonyoung Shim + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License as published by the + * Free Software Foundation; either version 2 of the License, or (at your + * option) any later version. + * + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include + +struct clk *otg_clk; +static int s5p64x0_otg_phy_init(struct platform_device *pdev) +{ + int err; + + otg_clk = clk_get(&pdev->dev, "otg"); + if (IS_ERR(otg_clk)) { + dev_err(&pdev->dev, "Failed to get otg clock\n"); + return PTR_ERR(otg_clk); + } + + err = clk_enable(otg_clk); + if (err) { + clk_put(otg_clk); + return err; + } + + if (gpio_is_valid(S5P6440_GPN(1))) { + err = gpio_request(S5P6440_GPN(1), "GPN"); + if (err) + printk(KERN_ERR "failed to request GPN1\n"); + gpio_direction_output(S5P6440_GPN(1), 1); + } + + writel(readl(S5P64X0_OTHERS)&~S5P64X0_OTHERS_USB_SIG_MASK, + S5P64X0_OTHERS); + writel(0x0, S3C_PHYPWR); /* Power up */ + writel(S3C_PHYCLK_CLKSEL_12M, S3C_PHYCLK); + writel(S3C_RSTCON_PHY, S3C_RSTCON); + + udelay(50); + writel(0x0, S3C_RSTCON); + udelay(50); + + return 0; +} + +static int s5p64x0_otg_phy_exit(struct platform_device *pdev) +{ + writel(readl(S3C_PHYPWR)|(0x1F<<1), S3C_PHYPWR); + writel(readl(S5P64X0_OTHERS)&~S5P64X0_OTHERS_USB_SIG_MASK, + S5P64X0_OTHERS); + + gpio_free(S5P6440_GPN(1)); + + clk_disable(otg_clk); + clk_put(otg_clk); + + return 0; +} + +int s5p_usb_phy_init(struct platform_device *pdev, int type) +{ + if (type == S5P_USB_PHY_DEVICE) + return s5p64x0_otg_phy_init(pdev); + + return -EINVAL; +} + +int s5p_usb_phy_exit(struct platform_device *pdev, int type) +{ + if (type == S5P_USB_PHY_DEVICE) + return s5p64x0_otg_phy_exit(pdev); + + return -EINVAL; +} diff --git a/arch/arm/plat-s5p/include/plat/otg.h b/arch/arm/plat-s5p/include/plat/otg.h new file mode 100644 index 0000000..3111dcc --- /dev/null +++ b/arch/arm/plat-s5p/include/plat/otg.h @@ -0,0 +1,29 @@ +/* + * Copyright (C) 2011 Samsung Electronics Co.Ltd + * Author: Praveen Paneri + * based on arch/arm/plat-s5p/include/plat/usb-phy.h + * written by Joonyoung Shim + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License as published by the + * Free Software Foundation; either version 2 of the License, or (at your + * option) any later version. + */ + +#ifndef __PLAT_S5P_OTG_H +#define __PLAT_S5P_OTG_H + +struct s5p_otg_platdata { + int (*phy_init)(struct platform_device *pdev, int type); + int (*phy_exit)(struct platform_device *pdev, int type); + u32 dev_rx_fifo_size; + u32 dev_nptx_fifo_size; + u32 host_rx_fifo_size; + u32 host_nptx_fifo_size; + u32 host_ch_num; + +}; + +extern void s5p_otg_set_platdata(struct s5p_otg_platdata *pd); + +#endif /* __PLAT_S5P_OTG_H */