From patchwork Fri Jun 24 14:10:59 2011 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Marc Zyngier X-Patchwork-Id: 916372 Received: from merlin.infradead.org (merlin.infradead.org [205.233.59.134]) by demeter2.kernel.org (8.14.4/8.14.4) with ESMTP id p5OEMpJa032013 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-SHA bits=256 verify=NO) for ; Fri, 24 Jun 2011 14:23:13 GMT Received: from canuck.infradead.org ([134.117.69.58]) by merlin.infradead.org with esmtps (Exim 4.76 #1 (Red Hat Linux)) id 1Qa7HE-0001na-CR; Fri, 24 Jun 2011 14:22:33 +0000 Received: from localhost ([127.0.0.1] helo=canuck.infradead.org) by canuck.infradead.org with esmtp (Exim 4.76 #1 (Red Hat Linux)) id 1Qa7HC-00060K-Ny; Fri, 24 Jun 2011 14:22:30 +0000 Received: from casper.infradead.org ([2001:770:15f::2]) by canuck.infradead.org with esmtps (Exim 4.76 #1 (Red Hat Linux)) id 1Qa76x-0005hl-6H for linux-arm-kernel@canuck.infradead.org; Fri, 24 Jun 2011 14:11:55 +0000 Received: from service87.mimecast.com ([94.185.240.25]) by casper.infradead.org with smtp (Exim 4.76 #1 (Red Hat Linux)) id 1Qa76u-0002eH-T6 for linux-arm-kernel@lists.infradead.org; Fri, 24 Jun 2011 14:11:53 +0000 Received: from cam-owa2.Emea.Arm.com (fw-tnat.cambridge.arm.com [217.140.96.21]) by service87.mimecast.com; Fri, 24 Jun 2011 15:11:09 +0100 Received: from localhost.localdomain ([10.1.255.212]) by cam-owa2.Emea.Arm.com with Microsoft SMTPSVC(6.0.3790.3959); Fri, 24 Jun 2011 15:10:55 +0100 From: Marc Zyngier To: linux-arm-kernel@lists.infradead.org, devicetree-discuss@lists.ozlabs.org Subject: [RFC PATCH 4/4] ARM: dt: Add TWD bindings and driver support Date: Fri, 24 Jun 2011 15:10:59 +0100 Message-Id: <1308924659-31894-5-git-send-email-marc.zyngier@arm.com> X-Mailer: git-send-email 1.7.0.4 In-Reply-To: <1308924659-31894-1-git-send-email-marc.zyngier@arm.com> References: <1308924659-31894-1-git-send-email-marc.zyngier@arm.com> X-OriginalArrivalTime: 24 Jun 2011 14:10:55.0644 (UTC) FILETIME=[889E45C0:01CC3278] X-MC-Unique: 111062415110900701 X-CRM114-Version: 20090807-BlameThorstenAndJenny ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20110624_151153_031732_591CBC9F X-CRM114-Status: GOOD ( 18.34 ) X-Spam-Score: -2.6 (--) X-Spam-Report: SpamAssassin version 3.3.2-r929478 on casper.infradead.org summary: Content analysis details: (-2.6 points, 5.0 required) pts rule name description ---- ---------------------- -------------------------------------------------- -0.7 RCVD_IN_DNSWL_LOW RBL: Sender listed at http://www.dnswl.org/, low trust [94.185.240.25 listed in list.dnswl.org] -0.0 SPF_PASS SPF: sender matches SPF record -1.9 BAYES_00 BODY: Bayes spam probability is 0 to 1% [score: 0.0000] Cc: Grant Likely X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.12 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: linux-arm-kernel-bounces@lists.infradead.org Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Greylist: IP, sender and recipient auto-whitelisted, not delayed by milter-greylist-4.2.6 (demeter2.kernel.org [140.211.167.43]); Fri, 24 Jun 2011 14:23:13 +0000 (UTC) Add device tree support to the arm_smp_twd driver. The DT bindings for the TWD are defined as such: - one timer node per CPU, using corresponding PPI interrupt controller - provides both timer and watchdog interrupt Tested on RealView PB11MPCore and VExpress. Signed-off-by: Marc Zyngier --- Documentation/devicetree/bindings/arm/twd.txt | 54 ++++++++++++++ drivers/clocksource/arm_smp_twd.c | 92 +++++++++++++++++++++--- 2 files changed, 134 insertions(+), 12 deletions(-) create mode 100644 Documentation/devicetree/bindings/arm/twd.txt diff --git a/Documentation/devicetree/bindings/arm/twd.txt b/Documentation/devicetree/bindings/arm/twd.txt new file mode 100644 index 0000000..3823a81 --- /dev/null +++ b/Documentation/devicetree/bindings/arm/twd.txt @@ -0,0 +1,54 @@ +* ARM Timer Watchdog + +ARM SMP cores are often associated with a TWD providing a per-cpu timer +and a per-cpu watchdog. Usually wired to the PPI interface of a GIC. + +Main node properties: + +- compatible : "arm,smp-twd", "localtimer" +- reg : register mapping for the registers. +- #address-cells : <1> +- #size-cells : <0> + +Timer sub nodes (one per CPU) + +- interrupt-parent : phandle to the corresponding gic-ppi. +- interrupts : (usually <29 30>) +- reg : index of the CPU this timer is connected to. + +Example (ARM RealView PB11-MPCore): + +localtimer@1f000600 { + compatible = "arm,smp-twd", "localtimer"; + reg = <0x1f000600 0x100>; + #address-cells = <1>; + #size-cells = <0>; + + /* + * One timer per CPU, bound to the corresponding + * PPI interface. + */ + timer@0 { + interrupt-parent = <&gic0ppi0>; + interrupts = <29 30>; + reg = <0>; + }; + + timer@1 { + interrupt-parent = <&gic0ppi1>; + interrupts = <29 30>; + reg = <1>; + }; + + timer@2 { + interrupt-parent = <&gic0ppi2>; + interrupts = <29 30>; + reg = <2>; + }; + + timer@3 { + interrupt-parent = <&gic0ppi3>; + interrupts = <29 30>; + reg = <3>; + }; +}; diff --git a/drivers/clocksource/arm_smp_twd.c b/drivers/clocksource/arm_smp_twd.c index 65f4669..586acad 100644 --- a/drivers/clocksource/arm_smp_twd.c +++ b/drivers/clocksource/arm_smp_twd.c @@ -19,6 +19,9 @@ #include #include #include +#include +#include +#include #include #include #include @@ -37,11 +40,11 @@ #define TWD_TIMER_CONTROL_IT_ENABLE (1 << 2) static void __iomem *twd_base; -static int twd_ppi; static struct clk *twd_clk; static unsigned long twd_timer_rate; static DEFINE_PER_CPU(bool, irq_reqd); +static DEFINE_PER_CPU(int, twd_irq); static struct clock_event_device __percpu *twd_evt; static void twd_set_mode(enum clock_event_mode mode, @@ -223,7 +226,7 @@ static void __cpuinit twd_setup(void *data) clk->rating = 450; clk->set_mode = twd_set_mode; clk->set_next_event = twd_set_next_event; - clk->irq = gic_ppi_to_vppi(twd_ppi); + clk->irq = __get_cpu_var(twd_irq); clk->cpumask = cpumask_of(smp_processor_id()); pr_debug("Configuring %s on cpu #%d\n", clk->name, smp_processor_id()); @@ -290,31 +293,90 @@ static struct notifier_block __cpuinitdata twd_cpu_nb = { .notifier_call = twd_cpu_notify, }; -static int twd_probe(struct platform_device *pdev) +#ifdef CONFIG_OF +static struct device_node *twd_get_timer_node(struct device_node *twd_np, + struct device_node *child, + int *timer_nr) +{ + child = of_get_next_child(twd_np, child); + if (child) { + const __be32 *reg; + reg = of_get_property(child, "reg", NULL); + if (!reg) + *timer_nr = -1; + else + *timer_nr = be32_to_cpu(*reg); + } + + return child; +} + +static int __devinit twd_of_probe_irq(struct platform_device *pdev) +{ + struct device_node *timer = NULL; + int timer_nr; + + if (!pdev->dev.of_node) + return -1; + + while((timer = twd_get_timer_node(pdev->dev.of_node, + timer, &timer_nr))) { + if (timer_nr < 0 || timer_nr >= NR_CPUS) { + dev_info(&pdev->dev, "Unknown timer id %d\n", timer_nr); + continue; + } + + per_cpu(twd_irq, timer_nr) = irq_of_parse_and_map(timer, 0); + pr_info("%s IRQ%d", timer->full_name, per_cpu(twd_irq, timer_nr)); + } + + return 0; +} +#else +static int __devinit twd_of_probe_irq(struct platform_device *pdev) +{ + return -1; +} +#endif + +static int __devinit twd_probe(struct platform_device *pdev) { struct resource *mem; struct clock_event_device *clk; - int irq; if (twd_base) return -EBUSY; mem = platform_get_resource(pdev, IORESOURCE_MEM, 0); - irq = platform_get_irq(pdev, 0); - if (!mem || irq < 0) + if (!mem) return -EINVAL; + twd_base = ioremap(mem->start, resource_size(mem)); + + if (!twd_base) + return -ENOMEM; + + if (twd_of_probe_irq(pdev)) { + int irq; + int i; - twd_base = ioremap(mem->start, resource_size(mem)); - twd_evt = alloc_percpu(struct clock_event_device); - if (!twd_base || !twd_evt) { + irq = platform_get_irq(pdev, 0); + if (irq < 0) { + iounmap(twd_base); + return -EINVAL; + } + + for (i = 0; i < NR_CPUS; i++) + per_cpu(twd_irq, i) = gic_ppi_to_cpu_vppi(irq, i); + } + + twd_evt = alloc_percpu(struct clock_event_device); + if (!twd_evt) { iounmap(twd_base); twd_base = NULL; free_percpu(twd_evt); return -ENOMEM; } - twd_ppi = irq; - /* Immediately configure the timer on the boot CPU */ clk = per_cpu_ptr(twd_evt, smp_processor_id()); twd_setup(clk); @@ -329,11 +391,17 @@ static int twd_remove(struct platform_device *pdev) return -EBUSY; } +static const struct of_device_id twd_of_ids[] = { + { .compatible = "arm,smp-twd" }, + { }, +}; + static struct platform_driver twd_driver = { .probe = twd_probe, .remove = __devexit_p(twd_remove), .driver = { - .name = "arm_smp_twd", + .name = "arm_smp_twd", + .of_match_table = twd_of_ids, }, };