From patchwork Tue Jul 5 15:05:37 2011 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Shawn Guo X-Patchwork-Id: 945802 Received: from merlin.infradead.org (merlin.infradead.org [205.233.59.134]) by demeter2.kernel.org (8.14.4/8.14.4) with ESMTP id p65FnbHG006702 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-SHA bits=256 verify=NO) for ; Tue, 5 Jul 2011 15:50:07 GMT Received: from canuck.infradead.org ([2001:4978:20e::1]) by merlin.infradead.org with esmtps (Exim 4.76 #1 (Red Hat Linux)) id 1Qe7sO-0002Dn-EW; Tue, 05 Jul 2011 15:49:28 +0000 Received: from localhost ([127.0.0.1] helo=canuck.infradead.org) by canuck.infradead.org with esmtp (Exim 4.76 #1 (Red Hat Linux)) id 1Qe76O-0003p1-Mm; Tue, 05 Jul 2011 14:59:52 +0000 Received: from tx2ehsobe003.messaging.microsoft.com ([65.55.88.13] helo=TX2EHSOBE006.bigfish.com) by canuck.infradead.org with esmtps (Exim 4.76 #1 (Red Hat Linux)) id 1Qe760-0003lL-Q0 for linux-arm-kernel@lists.infradead.org; Tue, 05 Jul 2011 14:59:30 +0000 Received: from mail32-tx2-R.bigfish.com (10.9.14.240) by TX2EHSOBE006.bigfish.com (10.9.40.26) with Microsoft SMTP Server id 14.1.225.22; Tue, 5 Jul 2011 14:59:25 +0000 Received: from mail32-tx2 (localhost.localdomain [127.0.0.1]) by mail32-tx2-R.bigfish.com (Postfix) with ESMTP id 504C0258133; Tue, 5 Jul 2011 14:59:25 +0000 (UTC) X-SpamScore: 8 X-BigFish: VS8(za62pzzz1202hzz8275dhz2dh87h2a8h668h839h64h) X-Spam-TCS-SCL: 3:0 X-Forefront-Antispam-Report: CIP:70.37.183.190; KIP:(null); UIP:(null); IPVD:NLI; H:mail.freescale.net; RD:none; EFVD:NLI X-FB-DOMAIN-IP-MATCH: fail Received: from mail32-tx2 (localhost.localdomain [127.0.0.1]) by mail32-tx2 (MessageSwitch) id 1309877964674256_13978; Tue, 5 Jul 2011 14:59:24 +0000 (UTC) Received: from TX2EHSMHS005.bigfish.com (unknown [10.9.14.243]) by mail32-tx2.bigfish.com (Postfix) with ESMTP id 991EB4E005B; Tue, 5 Jul 2011 14:59:24 +0000 (UTC) Received: from mail.freescale.net (70.37.183.190) by TX2EHSMHS005.bigfish.com (10.9.99.105) with Microsoft SMTP Server (TLS) id 14.1.225.22; Tue, 5 Jul 2011 14:59:24 +0000 Received: from az33smr02.freescale.net (10.64.34.200) by 039-SN1MMR1-002.039d.mgd.msft.net (10.84.1.15) with Microsoft SMTP Server id 14.1.289.8; Tue, 5 Jul 2011 09:59:23 -0500 Received: from S2100-06.ap.freescale.net (S2100-06.ap.freescale.net [10.192.242.125]) by az33smr02.freescale.net (8.13.1/8.13.0) with ESMTP id p65ExHrQ026202; Tue, 5 Jul 2011 09:59:20 -0500 (CDT) From: Shawn Guo To: Subject: [PATCH v2 1/2] serial/imx: get rid of the uses of cpu_is_mx1() Date: Tue, 5 Jul 2011 23:05:37 +0800 Message-ID: <1309878338-25697-2-git-send-email-shawn.guo@linaro.org> X-Mailer: git-send-email 1.7.4.1 In-Reply-To: <1309878338-25697-1-git-send-email-shawn.guo@linaro.org> References: <1309878338-25697-1-git-send-email-shawn.guo@linaro.org> MIME-Version: 1.0 X-OriginatorOrg: sigmatel.com X-CRM114-Version: 20090807-BlameThorstenAndJenny ( TRE 0.7.6 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20110705_105929_084151_CF8FFD30 X-CRM114-Status: GOOD ( 24.19 ) X-Spam-Score: -2.3 (--) X-Spam-Report: SpamAssassin version 3.3.1 on canuck.infradead.org summary: Content analysis details: (-2.3 points) pts rule name description ---- ---------------------- -------------------------------------------------- -2.3 RCVD_IN_DNSWL_MED RBL: Sender listed at http://www.dnswl.org/, medium trust [65.55.88.13 listed in list.dnswl.org] Cc: patches@linaro.org, devicetree-discuss@lists.ozlabs.org, linux-arm-kernel@lists.infradead.org, Shawn Guo , Sascha Hauer , Alan Cox X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.12 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: linux-arm-kernel-bounces@lists.infradead.org Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Greylist: IP, sender and recipient auto-whitelisted, not delayed by milter-greylist-4.2.6 (demeter2.kernel.org [140.211.167.43]); Tue, 05 Jul 2011 15:50:07 +0000 (UTC) The patch removes all the uses of cpu_is_mx1(). Instead, it uses the .id_table of platform_driver to distinguish the uart device type. A couple of !cpu_is_mx1() logic gets turned into IS_IMX_UART, as the codes wrapped there are really IMX specific. It also removes macro MX1_UCR3_REF25 and MX1_UCR3_REF30 which are not used anywhere. Signed-off-by: Shawn Guo Cc: Sascha Hauer Cc: Alan Cox --- arch/arm/mach-imx/clock-imx1.c | 6 +- arch/arm/plat-mxc/devices/platform-imx-uart.c | 2 +- drivers/tty/serial/imx.c | 65 ++++++++++++++++++++----- 3 files changed, 56 insertions(+), 17 deletions(-) diff --git a/arch/arm/mach-imx/clock-imx1.c b/arch/arm/mach-imx/clock-imx1.c index dcc4172..4aabeb2 100644 --- a/arch/arm/mach-imx/clock-imx1.c +++ b/arch/arm/mach-imx/clock-imx1.c @@ -587,9 +587,9 @@ static struct clk_lookup lookups[] __initdata = { _REGISTER_CLOCK(NULL, "mma", mma_clk) _REGISTER_CLOCK("imx_udc.0", NULL, usbd_clk) _REGISTER_CLOCK(NULL, "gpt", gpt_clk) - _REGISTER_CLOCK("imx-uart.0", NULL, uart_clk) - _REGISTER_CLOCK("imx-uart.1", NULL, uart_clk) - _REGISTER_CLOCK("imx-uart.2", NULL, uart_clk) + _REGISTER_CLOCK("imx1-uart.0", NULL, uart_clk) + _REGISTER_CLOCK("imx1-uart.1", NULL, uart_clk) + _REGISTER_CLOCK("imx1-uart.2", NULL, uart_clk) _REGISTER_CLOCK("imx-i2c.0", NULL, i2c_clk) _REGISTER_CLOCK("imx1-cspi.0", NULL, spi_clk) _REGISTER_CLOCK("imx1-cspi.1", NULL, spi_clk) diff --git a/arch/arm/plat-mxc/devices/platform-imx-uart.c b/arch/arm/plat-mxc/devices/platform-imx-uart.c index cfce8c9..477271a 100644 --- a/arch/arm/plat-mxc/devices/platform-imx-uart.c +++ b/arch/arm/plat-mxc/devices/platform-imx-uart.c @@ -152,7 +152,7 @@ struct platform_device *__init imx_add_imx_uart_3irq( }, }; - return imx_add_platform_device("imx-uart", data->id, res, + return imx_add_platform_device("imx1-uart", data->id, res, ARRAY_SIZE(res), pdata, sizeof(*pdata)); } diff --git a/drivers/tty/serial/imx.c b/drivers/tty/serial/imx.c index 22fe801..ddebb5c 100644 --- a/drivers/tty/serial/imx.c +++ b/drivers/tty/serial/imx.c @@ -48,7 +48,6 @@ #include #include -#include #include /* Register definitions */ @@ -66,8 +65,9 @@ #define UBIR 0xa4 /* BRM Incremental Register */ #define UBMR 0xa8 /* BRM Modulator Register */ #define UBRC 0xac /* Baud Rate Count Register */ -#define MX2_ONEMS 0xb0 /* One Millisecond register */ -#define UTS (cpu_is_mx1() ? 0xd0 : 0xb4) /* UART Test Register */ +#define IMX_ONEMS 0xb0 /* One Millisecond register */ +#define IMX1_UTS 0xd0 /* UART Test Register on i.mx1 */ +#define IMX_UTS 0xb4 /* UART Test Register on all other i.mx*/ /* UART Control Register Bit Fields.*/ #define URXD_CHARRDY (1<<15) @@ -87,7 +87,7 @@ #define UCR1_RTSDEN (1<<5) /* RTS delta interrupt enable */ #define UCR1_SNDBRK (1<<4) /* Send break */ #define UCR1_TDMAEN (1<<3) /* Transmitter ready DMA enable */ -#define MX1_UCR1_UARTCLKEN (1<<2) /* UART clock enabled, mx1 only */ +#define IMX1_UCR1_UARTCLKEN (1<<2) /* UART clock enabled, i.mx1 only */ #define UCR1_DOZE (1<<1) /* Doze */ #define UCR1_UARTEN (1<<0) /* UART enabled */ #define UCR2_ESCI (1<<15) /* Escape seq interrupt enable */ @@ -113,9 +113,7 @@ #define UCR3_RXDSEN (1<<6) /* Receive status interrupt enable */ #define UCR3_AIRINTEN (1<<5) /* Async IR wake interrupt enable */ #define UCR3_AWAKEN (1<<4) /* Async wake interrupt enable */ -#define MX1_UCR3_REF25 (1<<3) /* Ref freq 25 MHz, only on mx1 */ -#define MX1_UCR3_REF30 (1<<2) /* Ref Freq 30 MHz, only on mx1 */ -#define MX2_UCR3_RXDMUXSEL (1<<2) /* RXD Muxed Input Select, on mx2/mx3 */ +#define IMX_UCR3_RXDMUXSEL (1<<2) /* RXD Muxed Input Select */ #define UCR3_INVT (1<<1) /* Inverted Infrared transmission */ #define UCR3_BPEN (1<<0) /* Preset registers enable */ #define UCR4_CTSTL_SHF 10 /* CTS trigger level shift */ @@ -181,6 +179,17 @@ #define UART_NR 8 +enum imx_uart_type { + IMX1_UART, + IMX_UART, +}; + +/* device type dependent stuff */ +struct imx_uart_data { + unsigned uts_reg; + enum imx_uart_type devtype; +}; + struct imx_port { struct uart_port port; struct timer_list timer; @@ -192,6 +201,7 @@ struct imx_port { unsigned int irda_inv_tx:1; unsigned short trcv_delay; /* transceiver delay */ struct clk *clk; + struct imx_uart_data *devdata; }; #ifdef CONFIG_IRDA @@ -200,6 +210,33 @@ struct imx_port { #define USE_IRDA(sport) (0) #endif +#define UTS (sport->devdata->uts_reg) +#define IS_IMX1_UART() (sport->devdata->devtype == IMX1_UART) +#define IS_IMX_UART() (sport->devdata->devtype == IMX_UART) + +static struct imx_uart_data imx_uart_devdata[] = { + [IMX1_UART] = { + .uts_reg = IMX1_UTS, + .devtype = IMX1_UART, + }, + [IMX_UART] = { + .uts_reg = IMX_UTS, + .devtype = IMX_UART, + }, +}; + +static struct platform_device_id imx_uart_devtype[] = { + { + .name = "imx1-uart", + .driver_data = (kernel_ulong_t) &imx_uart_devdata[IMX1_UART], + }, { + .name = "imx-uart", + .driver_data = (kernel_ulong_t) &imx_uart_devdata[IMX_UART], + }, { + /* sentinel */ + } +}; + /* * Handle any change of modem status signal since we were last called. */ @@ -689,9 +726,9 @@ static int imx_startup(struct uart_port *port) } } - if (!cpu_is_mx1()) { + if (IS_IMX_UART()) { temp = readl(sport->port.membase + UCR3); - temp |= MX2_UCR3_RXDMUXSEL; + temp |= IMX_UCR3_RXDMUXSEL; writel(temp, sport->port.membase + UCR3); } @@ -923,9 +960,9 @@ imx_set_termios(struct uart_port *port, struct ktermios *termios, writel(num, sport->port.membase + UBIR); writel(denom, sport->port.membase + UBMR); - if (!cpu_is_mx1()) + if (IS_IMX_UART()) writel(sport->port.uartclk / div / 1000, - sport->port.membase + MX2_ONEMS); + sport->port.membase + IMX_ONEMS); writel(old_ucr1, sport->port.membase + UCR1); @@ -1062,8 +1099,8 @@ imx_console_write(struct console *co, const char *s, unsigned int count) ucr1 = old_ucr1 = readl(sport->port.membase + UCR1); old_ucr2 = readl(sport->port.membase + UCR2); - if (cpu_is_mx1()) - ucr1 |= MX1_UCR1_UARTCLKEN; + if (IS_IMX1_UART()) + ucr1 |= IMX1_UCR1_UARTCLKEN; ucr1 |= UCR1_UARTEN; ucr1 &= ~(UCR1_TXMPTYEN | UCR1_RRDYEN | UCR1_RTSDEN); @@ -1262,6 +1299,7 @@ static int serial_imx_probe(struct platform_device *pdev) init_timer(&sport->timer); sport->timer.function = imx_timeout; sport->timer.data = (unsigned long)sport; + sport->devdata = (struct imx_uart_data *) pdev->id_entry->driver_data; sport->clk = clk_get(&pdev->dev, "uart"); if (IS_ERR(sport->clk)) { @@ -1340,6 +1378,7 @@ static struct platform_driver serial_imx_driver = { .suspend = serial_imx_suspend, .resume = serial_imx_resume, + .id_table = imx_uart_devtype, .driver = { .name = "imx-uart", .owner = THIS_MODULE,