From patchwork Thu Jul 14 23:51:59 2011 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jean-Christophe PLAGNIOL-VILLARD X-Patchwork-Id: 976952 Received: from merlin.infradead.org (merlin.infradead.org [205.233.59.134]) by demeter1.kernel.org (8.14.4/8.14.4) with ESMTP id p6F0AOKC007892 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-SHA bits=256 verify=NO) for ; Fri, 15 Jul 2011 00:10:45 GMT Received: from canuck.infradead.org ([2001:4978:20e::1]) by merlin.infradead.org with esmtps (Exim 4.76 #1 (Red Hat Linux)) id 1QhVyc-0003NG-8b; Fri, 15 Jul 2011 00:09:54 +0000 Received: from localhost ([127.0.0.1] helo=canuck.infradead.org) by canuck.infradead.org with esmtp (Exim 4.76 #1 (Red Hat Linux)) id 1QhVyb-00050E-9f; Fri, 15 Jul 2011 00:09:53 +0000 Received: from 14.mo4.mail-out.ovh.net ([46.105.40.29] helo=mo4.mail-out.ovh.net) by canuck.infradead.org with esmtp (Exim 4.76 #1 (Red Hat Linux)) id 1QhVxI-0004iK-Nn for linux-arm-kernel@lists.infradead.org; Fri, 15 Jul 2011 00:08:38 +0000 Received: from mail187.ha.ovh.net (b9.ovh.net [213.186.33.59]) by mo4.mail-out.ovh.net (Postfix) with SMTP id 28B3AFFB03C for ; Fri, 15 Jul 2011 02:08:50 +0200 (CEST) Received: from b0.ovh.net (HELO queueout) (213.186.33.50) by b0.ovh.net with SMTP; 15 Jul 2011 02:08:28 +0200 Received: from ns32433.ovh.net (HELO localhost) (plagnioj%jcrosoft.com@213.251.161.87) by ns0.ovh.net with SMTP; 15 Jul 2011 02:08:27 +0200 From: Jean-Christophe PLAGNIOL-VILLARD To: linux-arm-kernel@lists.infradead.org X-Ovh-Mailout: 178.32.228.4 (mo4.mail-out.ovh.net) Subject: [PATCH 1/7] at91rm9200: emac move register header to drivers Date: Fri, 15 Jul 2011 01:51:59 +0200 Message-Id: <1310687525-22486-1-git-send-email-plagnioj@jcrosoft.com> X-Mailer: git-send-email 1.7.2.3 X-Ovh-Tracer-Id: 9582252632820591613 X-Ovh-Remote: 213.251.161.87 (ns32433.ovh.net) X-Ovh-Local: 213.186.33.20 (ns0.ovh.net) X-Spam-Check: DONE|U 0.5/N X-VR-SPAMSTATE: OK X-VR-SPAMSCORE: -65 X-VR-SPAMCAUSE: gggruggvucftvghtrhhoucdtuddrfedvfedrudekucetggdotefuucfrrhhofhhilhgvmecuqfggjfenuceurghilhhouhhtmecufedttdenucesvcftvggtihhpihgvnhhtshculddquddttddmneftgiculdefhedm X-CRM114-Version: 20090807-BlameThorstenAndJenny ( TRE 0.7.6 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20110714_200833_160014_CF4196F6 X-CRM114-Status: GOOD ( 19.87 ) X-Spam-Score: 0.0 (/) X-Spam-Report: SpamAssassin version 3.3.1 on canuck.infradead.org summary: Content analysis details: (0.0 points) pts rule name description ---- ---------------------- -------------------------------------------------- -0.0 RCVD_IN_DNSWL_NONE RBL: Sender listed at http://www.dnswl.org/, no trust [46.105.40.29 listed in list.dnswl.org] Cc: Nicolas Ferre , Jean-Christophe PLAGNIOL-VILLARD , netdev@vger.kernel.org X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.12 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: linux-arm-kernel-bounces@lists.infradead.org Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Greylist: IP, sender and recipient auto-whitelisted, not delayed by milter-greylist-4.2.6 (demeter1.kernel.org [140.211.167.41]); Fri, 15 Jul 2011 00:10:45 +0000 (UTC) move from mach-at91/include/mach/at91rm9200_emac.h to drivers/net/arm/at91_ether.h Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD Cc: Nicolas Ferre Cc: netdev@vger.kernel.org --- drivers/net/arm/at91_ether.c | 1 - .../net/arm/at91_ether.h | 112 ++++++++++++++++++-- 2 files changed, 101 insertions(+), 12 deletions(-) rename arch/arm/mach-at91/include/mach/at91rm9200_emac.h => drivers/net/arm/at91_ether.h (65%) diff --git a/drivers/net/arm/at91_ether.c b/drivers/net/arm/at91_ether.c index e07b314..8f0b212 100644 --- a/drivers/net/arm/at91_ether.c +++ b/drivers/net/arm/at91_ether.c @@ -33,7 +33,6 @@ #include #include -#include #include #include diff --git a/arch/arm/mach-at91/include/mach/at91rm9200_emac.h b/drivers/net/arm/at91_ether.h similarity index 65% rename from arch/arm/mach-at91/include/mach/at91rm9200_emac.h rename to drivers/net/arm/at91_ether.h index b8260cd..58aed66 100644 --- a/arch/arm/mach-at91/include/mach/at91rm9200_emac.h +++ b/drivers/net/arm/at91_ether.h @@ -1,21 +1,21 @@ /* - * arch/arm/mach-at91/include/mach/at91rm9200_emac.h + * Ethernet driver for the Atmel AT91RM9200 (Thunder) * - * Copyright (C) 2005 Ivan Kokshaysky - * Copyright (C) SAN People + * Copyright (C) SAN People (Pty) Ltd * - * Ethernet MAC registers. - * Based on AT91RM9200 datasheet revision E. + * Based on an earlier Atmel EMAC macrocell driver by Atmel and Lineo Inc. + * Initial version by Rick Bronson. * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * as published by the Free Software Foundation; either version + * 2 of the License, or (at your option) any later version. */ -#ifndef AT91RM9200_EMAC_H -#define AT91RM9200_EMAC_H +#ifndef AT91_ETHERNET +#define AT91_ETHERNET +/* registers */ #define AT91_EMAC_CTL 0x00 /* Control Register */ #define AT91_EMAC_LB (1 << 0) /* Loopback */ #define AT91_EMAC_LBL (1 << 1) /* Loopback Local */ @@ -135,4 +135,94 @@ #define AT91_EMAC_SA4L 0xb0 /* Specific Address 4 Low, bytes 0-3 */ #define AT91_EMAC_SA4H 0xb4 /* Specific Address 4 High, bytes 4-5 */ +/* Davicom 9161 PHY */ +#define MII_DM9161_ID 0x0181b880 +#define MII_DM9161A_ID 0x0181b8a0 +#define MII_DSCR_REG 16 +#define MII_DSCSR_REG 17 +#define MII_DSINTR_REG 21 + +/* Intel LXT971A PHY */ +#define MII_LXT971A_ID 0x001378E0 +#define MII_ISINTE_REG 18 +#define MII_ISINTS_REG 19 +#define MII_LEDCTRL_REG 20 + +/* Realtek RTL8201 PHY */ +#define MII_RTL8201_ID 0x00008200 + +/* Broadcom BCM5221 PHY */ +#define MII_BCM5221_ID 0x004061e0 +#define MII_BCMINTR_REG 26 + +/* National Semiconductor DP83847 */ +#define MII_DP83847_ID 0x20005c30 + +/* National Semiconductor DP83848 */ +#define MII_DP83848_ID 0x20005c90 +#define MII_DPPHYSTS_REG 16 +#define MII_DPMICR_REG 17 +#define MII_DPMISR_REG 18 + +/* Altima AC101L PHY */ +#define MII_AC101L_ID 0x00225520 + +/* Micrel KS8721 PHY */ +#define MII_KS8721_ID 0x00221610 + +/* Teridian 78Q2123/78Q2133 */ +#define MII_T78Q21x3_ID 0x000e7230 +#define MII_T78Q21INT_REG 17 + +/* SMSC LAN83C185 */ +#define MII_LAN83C185_ID 0x0007C0A0 + +/* ........................................................................ */ + +#define MAX_RBUFF_SZ 0x600 /* 1518 rounded up */ +#define MAX_RX_DESCR 9 /* max number of receive buffers */ + +#define EMAC_DESC_DONE 0x00000001 /* bit for if DMA is done */ +#define EMAC_DESC_WRAP 0x00000002 /* bit for wrap */ + +#define EMAC_BROADCAST 0x80000000 /* broadcast address */ +#define EMAC_MULTICAST 0x40000000 /* multicast address */ +#define EMAC_UNICAST 0x20000000 /* unicast address */ + +struct rbf_t +{ + unsigned int addr; + unsigned long size; +}; + +struct recv_desc_bufs +{ + struct rbf_t descriptors[MAX_RX_DESCR]; /* must be on sizeof (rbf_t) boundary */ + char recv_buf[MAX_RX_DESCR][MAX_RBUFF_SZ]; /* must be on long boundary */ +}; + +struct at91_private +{ + struct mii_if_info mii; /* ethtool support */ + struct at91_eth_data board_data; /* board-specific configuration */ + struct clk *ether_clk; /* clock */ + + /* PHY */ + unsigned long phy_type; /* type of PHY (PHY_ID) */ + spinlock_t lock; /* lock for MDI interface */ + short phy_media; /* media interface type */ + unsigned short phy_address; /* 5-bit MDI address of PHY (0..31) */ + struct timer_list check_timer; /* Poll link status */ + + /* Transmit */ + struct sk_buff *skb; /* holds skb until xmit interrupt completes */ + dma_addr_t skb_physaddr; /* phys addr from pci_map_single */ + int skb_length; /* saved skb length for pci_unmap_single */ + + /* Receive */ + int rxBuffIndex; /* index into receive descriptor list */ + struct recv_desc_bufs *dlist; /* descriptor list address */ + struct recv_desc_bufs *dlist_phys; /* descriptor list physical address */ +}; + #endif