From patchwork Thu Jul 21 06:53:03 2011 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Shubhrajyoti Datta X-Patchwork-Id: 993862 Received: from merlin.infradead.org (merlin.infradead.org [205.233.59.134]) by demeter2.kernel.org (8.14.4/8.14.4) with ESMTP id p6L6sv05032649 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-SHA bits=256 verify=NO) for ; Thu, 21 Jul 2011 06:55:18 GMT Received: from canuck.infradead.org ([2001:4978:20e::1]) by merlin.infradead.org with esmtps (Exim 4.76 #1 (Red Hat Linux)) id 1Qjn9I-0006wy-RK; Thu, 21 Jul 2011 06:54:22 +0000 Received: from localhost ([127.0.0.1] helo=canuck.infradead.org) by canuck.infradead.org with esmtp (Exim 4.76 #1 (Red Hat Linux)) id 1Qjn9I-0007ll-Bv; Thu, 21 Jul 2011 06:54:20 +0000 Received: from arroyo.ext.ti.com ([192.94.94.40]) by canuck.infradead.org with esmtps (Exim 4.76 #1 (Red Hat Linux)) id 1Qjn8O-0007ZN-R5 for linux-arm-kernel@lists.infradead.org; Thu, 21 Jul 2011 06:53:27 +0000 Received: from dbdp20.itg.ti.com ([172.24.170.38]) by arroyo.ext.ti.com (8.13.7/8.13.7) with ESMTP id p6L6rLVp002902 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-SHA bits=256 verify=NO); Thu, 21 Jul 2011 01:53:23 -0500 Received: from dbde71.ent.ti.com (localhost [127.0.0.1]) by dbdp20.itg.ti.com (8.13.8/8.13.8) with ESMTP id p6L6rK8J015889; Thu, 21 Jul 2011 12:23:20 +0530 (IST) Received: from dbdp31.itg.ti.com (172.24.170.98) by DBDE71.ent.ti.com (172.24.170.149) with Microsoft SMTP Server id 8.3.106.1; Thu, 21 Jul 2011 12:23:21 +0530 Received: from a0393217ubnlt.india.ti.com ([172.24.190.93]) by dbdp31.itg.ti.com (8.13.8/8.13.8) with ESMTP id p6L6rAH7018167; Thu, 21 Jul 2011 12:23:17 +0530 (IST) From: Shubhrajyoti D To: Subject: [PATCH 3/5] OMAP: I2C: Remove the reset in the init path Date: Thu, 21 Jul 2011 12:23:03 +0530 Message-ID: <1311231185-5503-4-git-send-email-shubhrajyoti@ti.com> X-Mailer: git-send-email 1.7.1 In-Reply-To: <1311231185-5503-1-git-send-email-shubhrajyoti@ti.com> References: <1311231185-5503-1-git-send-email-shubhrajyoti@ti.com> MIME-Version: 1.0 X-CRM114-Version: 20090807-BlameThorstenAndJenny ( TRE 0.7.6 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20110721_025325_068714_3288B07F X-CRM114-Status: GOOD ( 17.32 ) X-Spam-Score: -3.5 (---) X-Spam-Report: SpamAssassin version 3.3.1 on canuck.infradead.org summary: Content analysis details: (-3.5 points) pts rule name description ---- ---------------------- -------------------------------------------------- -2.3 RCVD_IN_DNSWL_MED RBL: Sender listed at http://www.dnswl.org/, medium trust [192.94.94.40 listed in list.dnswl.org] -1.2 RP_MATCHES_RCVD Envelope sender domain matches handover relay domain Cc: khilman@ti.com, rnayak@ti.com, linux-i2c@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Shubhrajyoti D X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.12 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: linux-arm-kernel-bounces@lists.infradead.org Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Greylist: IP, sender and recipient auto-whitelisted, not delayed by milter-greylist-4.2.6 (demeter2.kernel.org [140.211.167.43]); Thu, 21 Jul 2011 06:55:18 +0000 (UTC) The reset in the driver at init is not needed anymore as the hwmod framework takes care of reseting it. Signed-off-by: Shubhrajyoti D --- drivers/i2c/busses/i2c-omap.c | 57 +++++++++++------------------------------ 1 files changed, 15 insertions(+), 42 deletions(-) diff --git a/drivers/i2c/busses/i2c-omap.c b/drivers/i2c/busses/i2c-omap.c index 8f87a37..d6ea7de 100644 --- a/drivers/i2c/busses/i2c-omap.c +++ b/drivers/i2c/busses/i2c-omap.c @@ -155,9 +155,6 @@ enum { #define OMAP_I2C_SYSTEST_SDA_O (1 << 0) /* SDA line drive out */ #endif -/* OCP_SYSSTATUS bit definitions */ -#define SYSS_RESETDONE_MASK (1 << 0) - /* OCP_SYSCONFIG bit definitions */ #define SYSC_CLOCKACTIVITY_MASK (0x3 << 8) #define SYSC_SIDLEMODE_MASK (0x3 << 3) @@ -182,6 +179,8 @@ struct omap_i2c_dev { u32 latency; /* maximum mpu wkup latency */ void (*set_mpu_wkup_lat)(struct device *dev, long latency); + int (*device_reset)(struct device *dev); + u32 speed; /* Speed of bus in Khz */ u16 cmd_err; u8 *buf; @@ -332,7 +331,6 @@ static int omap_i2c_init(struct omap_i2c_dev *dev) u16 psc = 0, scll = 0, sclh = 0, buf = 0; u16 fsscll = 0, fssclh = 0, hsscll = 0, hssclh = 0; unsigned long fclk_rate = 12000000; - unsigned long timeout; unsigned long internal_clk = 0; struct clk *fclk; struct platform_device *pdev; @@ -341,43 +339,7 @@ static int omap_i2c_init(struct omap_i2c_dev *dev) pdev = to_platform_device(dev->dev); pdata = pdev->dev.platform_data; - if (dev->rev >= OMAP_I2C_OMAP1_REV_2) { - /* Disable I2C controller before soft reset */ - omap_i2c_write_reg(dev, OMAP_I2C_CON_REG, - omap_i2c_read_reg(dev, OMAP_I2C_CON_REG) & - ~(OMAP_I2C_CON_EN)); - - omap_i2c_write_reg(dev, OMAP_I2C_SYSC_REG, SYSC_SOFTRESET_MASK); - /* For some reason we need to set the EN bit before the - * reset done bit gets set. */ - timeout = jiffies + OMAP_I2C_TIMEOUT; - omap_i2c_write_reg(dev, OMAP_I2C_CON_REG, OMAP_I2C_CON_EN); - while (!(omap_i2c_read_reg(dev, OMAP_I2C_SYSS_REG) & - SYSS_RESETDONE_MASK)) { - if (time_after(jiffies, timeout)) { - dev_warn(dev->dev, "timeout waiting " - "for controller reset\n"); - return -ETIMEDOUT; - } - msleep(1); - } - - /* SYSC register is cleared by the reset; rewrite it */ - if (dev->rev == OMAP_I2C_REV_ON_2430) { - - omap_i2c_write_reg(dev, OMAP_I2C_SYSC_REG, - SYSC_AUTOIDLE_MASK); - - } else if (dev->rev >= OMAP_I2C_REV_ON_3430) { - dev->syscstate = SYSC_AUTOIDLE_MASK; - dev->syscstate |= SYSC_ENAWAKEUP_MASK; - dev->syscstate |= (SYSC_IDLEMODE_SMART << - __ffs(SYSC_SIDLEMODE_MASK)); - dev->syscstate |= (SYSC_CLOCKACTIVITY_FCLK << - __ffs(SYSC_CLOCKACTIVITY_MASK)); - - omap_i2c_write_reg(dev, OMAP_I2C_SYSC_REG, - dev->syscstate); + if (dev->rev >= OMAP_I2C_REV_ON_3430) { /* * Enabling all wakup sources to stop I2C freezing on * WFI instruction. @@ -388,7 +350,7 @@ static int omap_i2c_init(struct omap_i2c_dev *dev) omap_i2c_write_reg(dev, OMAP_I2C_WE_REG, dev->westate); } - } + omap_i2c_write_reg(dev, OMAP_I2C_CON_REG, 0); if (pdata->flags & OMAP_I2C_FLAG_ALWAYS_ARMXOR_CLK) { @@ -612,6 +574,11 @@ static int omap_i2c_xfer_msg(struct i2c_adapter *adap, return r; if (r == 0) { dev_err(dev->dev, "controller timed out\n"); + if (dev->device_reset != NULL) { + r = dev->device_reset(dev->dev); + if (r < 0) + dev_err(dev->dev, "reset failed\n"); + } omap_i2c_init(dev); return -ETIMEDOUT; } @@ -622,6 +589,11 @@ static int omap_i2c_xfer_msg(struct i2c_adapter *adap, /* We have an error */ if (dev->cmd_err & (OMAP_I2C_STAT_AL | OMAP_I2C_STAT_ROVR | OMAP_I2C_STAT_XUDF)) { + if (dev->device_reset != NULL) { + r = dev->device_reset(dev->dev); + if (r < 0) + dev_err(dev->dev, "reset failed\n"); + } omap_i2c_init(dev); return -EIO; } @@ -1024,6 +996,7 @@ omap_i2c_probe(struct platform_device *pdev) if (pdata != NULL) { speed = pdata->clkrate; dev->set_mpu_wkup_lat = pdata->set_mpu_wkup_lat; + dev->device_reset = pdata->device_reset; } else { speed = 100; /* Default speed */ dev->set_mpu_wkup_lat = NULL;