From patchwork Tue Aug 9 10:46:52 2011 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Marc Zyngier X-Patchwork-Id: 1048962 Received: from merlin.infradead.org (merlin.infradead.org [205.233.59.134]) by demeter1.kernel.org (8.14.4/8.14.4) with ESMTP id p79AniP8031427 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-SHA bits=256 verify=NO) for ; Tue, 9 Aug 2011 10:50:05 GMT Received: from canuck.infradead.org ([134.117.69.58]) by merlin.infradead.org with esmtps (Exim 4.76 #1 (Red Hat Linux)) id 1QqjsA-0005kU-Uy; Tue, 09 Aug 2011 10:49:24 +0000 Received: from localhost ([127.0.0.1] helo=canuck.infradead.org) by canuck.infradead.org with esmtp (Exim 4.76 #1 (Red Hat Linux)) id 1QqjsA-0004m0-9f; Tue, 09 Aug 2011 10:49:22 +0000 Received: from service87.mimecast.com ([94.185.240.25]) by canuck.infradead.org with smtp (Exim 4.76 #1 (Red Hat Linux)) id 1QqjqD-0004CE-I9 for linux-arm-kernel@lists.infradead.org; Tue, 09 Aug 2011 10:47:24 +0000 Received: from cam-owa2.Emea.Arm.com (fw-tnat.cambridge.arm.com [217.140.96.21]) by service87.mimecast.com; Tue, 09 Aug 2011 11:47:16 +0100 Received: from localhost.localdomain ([10.1.255.212]) by cam-owa2.Emea.Arm.com with Microsoft SMTPSVC(6.0.3790.3959); Tue, 9 Aug 2011 11:46:56 +0100 From: Marc Zyngier To: linux-arm-kernel@lists.infradead.org Subject: [RFC PATCH 10/12] ARM: local timers: make MSM timers standalone Date: Tue, 9 Aug 2011 11:46:52 +0100 Message-Id: <1312886814-15627-11-git-send-email-marc.zyngier@arm.com> X-Mailer: git-send-email 1.7.0.4 In-Reply-To: <1312886814-15627-1-git-send-email-marc.zyngier@arm.com> References: <1312886814-15627-1-git-send-email-marc.zyngier@arm.com> X-OriginalArrivalTime: 09 Aug 2011 10:46:56.0838 (UTC) FILETIME=[A8B92E60:01CC5681] X-MC-Unique: 111080911471601101 X-CRM114-Version: 20090807-BlameThorstenAndJenny ( TRE 0.7.6 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20110809_064722_060308_AC31684E X-CRM114-Status: GOOD ( 15.61 ) X-Spam-Score: -0.7 (/) X-Spam-Report: SpamAssassin version 3.3.1 on canuck.infradead.org summary: Content analysis details: (-0.7 points) pts rule name description ---- ---------------------- -------------------------------------------------- -0.7 RCVD_IN_DNSWL_LOW RBL: Sender listed at http://www.dnswl.org/, low trust [94.185.240.25 listed in list.dnswl.org] Cc: David Brown , Stephen Boyd X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.12 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: linux-arm-kernel-bounces@lists.infradead.org Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Greylist: IP, sender and recipient auto-whitelisted, not delayed by milter-greylist-4.2.6 (demeter1.kernel.org [140.211.167.41]); Tue, 09 Aug 2011 10:50:05 +0000 (UTC) Following the same pattern used for smp_twd, allow the MSM timers to be built in standalone, without relying on the CONFIG_LOCAL_TIMER infrastructure and use a CPU notifier block to stop or start the timer on the secondary CPU. Cc: David Brown Cc: Stephen Boyd Signed-off-by: Marc Zyngier --- arch/arm/Kconfig | 2 +- arch/arm/mach-msm/timer.c | 64 +++++++++++++++++++++++++++++++++------------ 2 files changed, 48 insertions(+), 18 deletions(-) diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index 12cbeba..13cdba4 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -1436,7 +1436,7 @@ config HOTPLUG_CPU config LOCAL_TIMERS bool "Use local timer interrupts" - depends on SMP && !ARM_SMP_TWD + depends on SMP && !ARM_SMP_TWD && !ARCH_MSM default y help Enable support for local timers on SMP platforms, rather then the diff --git a/arch/arm/mach-msm/timer.c b/arch/arm/mach-msm/timer.c index 94e6fc5..f67ff1c 100644 --- a/arch/arm/mach-msm/timer.c +++ b/arch/arm/mach-msm/timer.c @@ -21,6 +21,7 @@ #include #include #include +#include #include #include @@ -110,15 +111,7 @@ static cycle_t msm_read_timer_count(struct clocksource *cs) static struct msm_clock *clockevent_to_clock(struct clock_event_device *evt) { -#ifdef CONFIG_SMP - int i; - for (i = 0; i < NR_TIMERS; i++) - if (evt == &(msm_clocks[i].clockevent)) - return &msm_clocks[i]; - return &msm_clocks[MSM_GLOBAL_TIMER]; -#else return container_of(evt, struct msm_clock, clockevent); -#endif } static int msm_timer_set_next_event(unsigned long cycles, @@ -193,7 +186,7 @@ static struct msm_clock msm_clocks[] = { } }; -static void __init msm_timer_init(void) +static void __init msm_timer_primary_setup(void) { int i; int res; @@ -263,16 +256,13 @@ static void __init msm_timer_init(void) } #ifdef CONFIG_SMP -int __cpuinit local_timer_setup(struct clock_event_device *evt) +static void __cpuinit msm_timer_secondary_setup(void *data) { static bool local_timer_inited; + struct clock_event_device *evt = data; struct msm_clock *clock = &msm_clocks[MSM_GLOBAL_TIMER]; int res; - /* Use existing clock_event for cpu 0 */ - if (!smp_processor_id()) - return 0; - writel(DGT_CLK_CTL_DIV_4, MSM_TMR_BASE + DGT_CLK_CTL); if (!local_timer_inited) { @@ -292,25 +282,65 @@ int __cpuinit local_timer_setup(struct clock_event_device *evt) evt->max_delta_ns = clockevent_delta2ns(0xf0000000 >> clock->shift, evt); evt->min_delta_ns = clockevent_delta2ns(4, evt); + evt->cpumask = cpumask_of(smp_processor_id()); res = gic_request_ppi(evt->irq, msm_timer_interrupt, evt); if (res) { pr_err("local_timer_setup: request_irq failed for %s\n", clock->clockevent.name); - return res; + return; } clockevents_register_device(evt); - return 0; } -void local_timer_stop(struct clock_event_device *evt) +void msm_timer_secondary_teardown(void *data) { + struct clock_event_device *evt = data; evt->set_mode(CLOCK_EVT_MODE_UNUSED, evt); gic_free_ppi(evt->irq, evt); } + +static int __cpuinit msm_timer_cpu_notify(struct notifier_block *self, + unsigned long action, void *data) +{ + int cpu = (int)data; + struct clock_event_device *clk; + + clk = &msm_clocks[MSM_GLOBAL_TIMER].clockevent; + + switch (action) { + case CPU_STARTING: + case CPU_STARTING_FROZEN: + smp_call_function_single(cpu, msm_timer_secondary_setup, + clk, 1); + break; + + case CPU_DOWN_PREPARE: + case CPU_DOWN_PREPARE_FROZEN: + smp_call_function_single(cpu, msm_timer_secondary_teardown, + clk, 1); + break; + } + + return NOTIFY_OK; +} + +static struct notifier_block __cpuinitdata msm_timer_cpu_nb = { + .notifier_call = msm_timer_cpu_notify, +}; #endif +static void __init msm_timer_init(void) +{ + /* Immediately configure the timer on the boot CPU */ + msm_timer_primary_setup(); + +#ifdef CONFIG_SMP + register_cpu_notifier(&msm_timer_cpu_nb); +#endif +} + struct sys_timer msm_timer = { .init = msm_timer_init };