From patchwork Thu Aug 11 14:01:56 2011 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Mark Rutland X-Patchwork-Id: 1057162 Received: from merlin.infradead.org (merlin.infradead.org [205.233.59.134]) by demeter2.kernel.org (8.14.4/8.14.4) with ESMTP id p7BE2d6E005289 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-SHA bits=256 verify=NO) for ; Thu, 11 Aug 2011 14:03:00 GMT Received: from canuck.infradead.org ([2001:4978:20e::1]) by merlin.infradead.org with esmtps (Exim 4.76 #1 (Red Hat Linux)) id 1QrVq5-00012c-1v; Thu, 11 Aug 2011 14:02:25 +0000 Received: from localhost ([127.0.0.1] helo=canuck.infradead.org) by canuck.infradead.org with esmtp (Exim 4.76 #1 (Red Hat Linux)) id 1QrVq4-0007CJ-IZ; Thu, 11 Aug 2011 14:02:24 +0000 Received: from cam-admin0.cambridge.arm.com ([217.140.96.50]) by canuck.infradead.org with esmtp (Exim 4.76 #1 (Red Hat Linux)) id 1QrVq0-0007Bs-C9 for linux-arm-kernel@lists.infradead.org; Thu, 11 Aug 2011 14:02:21 +0000 Received: from localhost.localdomain (e102822-lin.cambridge.arm.com [10.1.70.54]) by cam-admin0.cambridge.arm.com (8.12.6/8.12.6) with ESMTP id p7BE1O11002875; Thu, 11 Aug 2011 15:01:29 +0100 (BST) From: Mark Rutland To: devicetree-discuss@lists.ozlabs.org Subject: [PATCH] Add interrupts property to L2x0 OF binding Date: Thu, 11 Aug 2011 15:01:56 +0100 Message-Id: <1313071316-3363-1-git-send-email-mark.rutland@arm.com> X-Mailer: git-send-email 1.7.0.4 X-CRM114-Version: 20090807-BlameThorstenAndJenny ( TRE 0.7.6 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20110811_100220_671415_1EFCA38F X-CRM114-Status: GOOD ( 12.58 ) X-Spam-Score: -3.1 (---) X-Spam-Report: SpamAssassin version 3.3.1 on canuck.infradead.org summary: Content analysis details: (-3.1 points) pts rule name description ---- ---------------------- -------------------------------------------------- -2.3 RCVD_IN_DNSWL_MED RBL: Sender listed at http://www.dnswl.org/, medium trust [217.140.96.50 listed in list.dnswl.org] -0.8 RP_MATCHES_RCVD Envelope sender domain matches handover relay domain Cc: Mark Rutland , Arnd Bergmann , Will Deacon , Barry Song <21cnbao@gmail.com>, Rob Herring , Grant Likely , Olof Johansson , linux-arm-kernel@lists.infradead.org X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.12 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: linux-arm-kernel-bounces@lists.infradead.org Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Greylist: IP, sender and recipient auto-whitelisted, not delayed by milter-greylist-4.2.6 (demeter2.kernel.org [140.211.167.43]); Thu, 11 Aug 2011 14:03:00 +0000 (UTC) Following the discussion here: http://lists.ozlabs.org/pipermail/devicetree-discuss/2011-August/007301.html The L2x0 L2 Cache Controllers support a combined interrupt line which can be used for several events (e.g. read/write/parity errors on tag/data RAM, event counter increment/overflow). Unfortunately the OF binding does not represent the interrupt. This patch adds an "interrupts" property to the L2x0 OF binding, representing the combined interrupt line. Signed-off-by: Mark Rutland Cc: Rob Herring Cc: Grant Likely Cc: Arnd Bergmann Cc: Olof Johansson Cc: Barry Song <21cnbao@gmail.com> Cc: Will Deacon --- Documentation/devicetree/bindings/arm/l2cc.txt | 2 ++ 1 files changed, 2 insertions(+), 0 deletions(-) diff --git a/Documentation/devicetree/bindings/arm/l2cc.txt b/Documentation/devicetree/bindings/arm/l2cc.txt index f50e021..7ca5216 100644 --- a/Documentation/devicetree/bindings/arm/l2cc.txt +++ b/Documentation/devicetree/bindings/arm/l2cc.txt @@ -28,6 +28,7 @@ Optional properties: - arm,filter-ranges : Starting address and length of window to filter. Addresses in the filter window are directed to the M1 port. Other addresses will go to the M0 port. +- interrupts : 1 combined interrupt. Example: @@ -39,4 +40,5 @@ L2: cache-controller { arm,filter-latency = <0x80000000 0x8000000>; cache-unified; cache-level = <2>; + interrupts = <45>; };