From patchwork Tue Aug 16 17:52:14 2011 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: David Brown X-Patchwork-Id: 1072132 Received: from merlin.infradead.org (merlin.infradead.org [205.233.59.134]) by demeter2.kernel.org (8.14.4/8.14.4) with ESMTP id p7GHrlNn009738 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-SHA bits=256 verify=NO) for ; Tue, 16 Aug 2011 17:54:08 GMT Received: from canuck.infradead.org ([2001:4978:20e::1]) by merlin.infradead.org with esmtps (Exim 4.76 #1 (Red Hat Linux)) id 1QtNpK-0008W4-OC; Tue, 16 Aug 2011 17:53:23 +0000 Received: from localhost ([127.0.0.1] helo=canuck.infradead.org) by canuck.infradead.org with esmtp (Exim 4.76 #1 (Red Hat Linux)) id 1QtNpK-0008Ry-77; Tue, 16 Aug 2011 17:53:22 +0000 Received: from wolverine01.qualcomm.com ([199.106.114.254]) by canuck.infradead.org with esmtps (Exim 4.76 #1 (Red Hat Linux)) id 1QtNow-0008Nd-GF for linux-arm-kernel@lists.infradead.org; Tue, 16 Aug 2011 17:52:59 +0000 X-IronPort-AV: E=McAfee;i="5400,1158,6440"; a="110727525" Received: from pdmz-ns-mip.qualcomm.com (HELO mostmsg01.qualcomm.com) ([199.106.114.10]) by wolverine01.qualcomm.com with ESMTP/TLS/ADH-AES256-SHA; 16 Aug 2011 10:52:28 -0700 Received: from codeaurora.org (pdmz-snip-v218.qualcomm.com [192.168.218.1]) by mostmsg01.qualcomm.com (Postfix) with ESMTPA id 6585A10004DF; Tue, 16 Aug 2011 10:52:28 -0700 (PDT) From: David Brown To: Randy Dunlap , David Brown , Daniel Walker , Bryan Huntsman , Alan Cox , Grant Likely Subject: [PATCH v2 2/4] msm_serial: Add devicetree support Date: Tue, 16 Aug 2011 10:52:14 -0700 Message-Id: <1313517136-27414-3-git-send-email-davidb@codeaurora.org> X-Mailer: git-send-email 1.7.5.4 In-Reply-To: <1313517136-27414-1-git-send-email-davidb@codeaurora.org> References: <1313517136-27414-1-git-send-email-davidb@codeaurora.org> X-CRM114-Version: 20090807-BlameThorstenAndJenny ( TRE 0.7.6 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20110816_135258_751262_A2820012 X-CRM114-Status: GOOD ( 26.18 ) X-Spam-Score: -2.3 (--) X-Spam-Report: SpamAssassin version 3.3.1 on canuck.infradead.org summary: Content analysis details: (-2.3 points) pts rule name description ---- ---------------------- -------------------------------------------------- -2.3 RCVD_IN_DNSWL_MED RBL: Sender listed at http://www.dnswl.org/, medium trust [199.106.114.254 listed in list.dnswl.org] Cc: Arnd Bergmann , linux-doc@vger.kernel.org, linux-arm-msm@vger.kernel.org, devicetree-discuss@lists.ozlabs.org, linux-kernel@vger.kernel.org, linux-serial@vger.kernel.org, linux-arm-kernel@lists.infradead.org X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.12 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: linux-arm-kernel-bounces@lists.infradead.org Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Greylist: IP, sender and recipient auto-whitelisted, not delayed by milter-greylist-4.2.6 (demeter2.kernel.org [140.211.167.43]); Tue, 16 Aug 2011 17:54:08 +0000 (UTC) Add devicetree support to the msm_serial driver. Clocks are still queried by direct name from the driver until device tree clock support is implemented. Signed-off-by: David Brown --- .../devicetree/bindings/tty/serial/msm_serial.txt | 22 ++++++++++++++++++++ drivers/tty/serial/msm_serial.c | 14 ++++++++++++ 2 files changed, 36 insertions(+), 0 deletions(-) create mode 100644 Documentation/devicetree/bindings/tty/serial/msm_serial.txt diff --git a/Documentation/devicetree/bindings/tty/serial/msm_serial.txt b/Documentation/devicetree/bindings/tty/serial/msm_serial.txt new file mode 100644 index 0000000..1b72e79 --- /dev/null +++ b/Documentation/devicetree/bindings/tty/serial/msm_serial.txt @@ -0,0 +1,22 @@ +* Qualcomm MSM UART + +Required properties: +- compatible : + - "qcom,msm-uart" +- reg : offset and length of the register set for the device + for the hsuart operating in compatible mode, there should be a + second pair describing the gsbi registers. +- interrupts : should contain the uart interrupt. + +There are two different UART blocks in MSM devices, "qcom,msm-uart" +and "qcom,msm-hsuart". The msm-serial driver is able to handle both +of these devices. + +Example: + + uart@19c400000 { + compatible = "qcom,msm-hsuart", "qcom,msm-uart"; + reg = <0x19c40000 0x1000>, + <0x19c00000 0x1000>; + interrupts = <195>; + }; diff --git a/drivers/tty/serial/msm_serial.c b/drivers/tty/serial/msm_serial.c index d9863b2..7767902 100644 --- a/drivers/tty/serial/msm_serial.c +++ b/drivers/tty/serial/msm_serial.c @@ -19,6 +19,7 @@ # define SUPPORT_SYSRQ #endif +#include #include #include #include @@ -33,6 +34,8 @@ #include #include #include +#include +#include #include "msm_serial.h" @@ -856,6 +859,8 @@ static struct uart_driver msm_uart_driver = { .cons = MSM_CONSOLE, }; +static atomic_t msm_uart_next_id = ATOMIC_INIT(0); + static int __init msm_serial_probe(struct platform_device *pdev) { struct msm_port *msm_port; @@ -863,6 +868,9 @@ static int __init msm_serial_probe(struct platform_device *pdev) struct uart_port *port; int irq; + if (pdev->id == -1) + pdev->id = atomic_inc_return(&msm_uart_next_id) - 1; + if (unlikely(pdev->id < 0 || pdev->id >= UART_NR)) return -ENXIO; @@ -920,11 +928,17 @@ static int __devexit msm_serial_remove(struct platform_device *pdev) return 0; } +static struct of_device_id msm_match_table[] = { + { .compatible = "qcom,msm-uart" }, + {} +}; + static struct platform_driver msm_platform_driver = { .remove = msm_serial_remove, .driver = { .name = "msm_serial", .owner = THIS_MODULE, + .of_match_table = msm_match_table, }, };