From patchwork Tue Aug 16 20:34:56 2011 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Rob Herring X-Patchwork-Id: 1072352 Received: from merlin.infradead.org (merlin.infradead.org [205.233.59.134]) by demeter2.kernel.org (8.14.4/8.14.4) with ESMTP id p7GKb0UD009747 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-SHA bits=256 verify=NO) for ; Tue, 16 Aug 2011 20:37:21 GMT Received: from canuck.infradead.org ([2001:4978:20e::1]) by merlin.infradead.org with esmtps (Exim 4.76 #1 (Red Hat Linux)) id 1QtQNE-0006rQ-2m; Tue, 16 Aug 2011 20:36:33 +0000 Received: from localhost ([127.0.0.1] helo=canuck.infradead.org) by canuck.infradead.org with esmtp (Exim 4.76 #1 (Red Hat Linux)) id 1QtQND-0007ZS-7Q; Tue, 16 Aug 2011 20:36:31 +0000 Received: from mail-ey0-f171.google.com ([209.85.215.171]) by canuck.infradead.org with esmtps (Exim 4.76 #1 (Red Hat Linux)) id 1QtQMI-0007Nz-9V for linux-arm-kernel@lists.infradead.org; Tue, 16 Aug 2011 20:35:37 +0000 Received: by mail-ey0-f171.google.com with SMTP id 24so321320eyg.30 for ; Tue, 16 Aug 2011 13:35:33 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=gamma; h=from:to:cc:subject:date:message-id:x-mailer:in-reply-to:references; bh=3qDwqTMZweXLku7mNrdiYQDEgi/owwy3QpN9MvgvN30=; b=OHYFp/bURYBJu58ZR2RK0lJgOlIJqVF3YzeY56xgL3HuDFdqCr6GGexVUX6htgDsc7 6+iY3u/hPPSH20ZP+9LrVIVKLa4nC7JZYMF4a7MubR4TVz3E61RH1kI+W9vDsppk24eu W4FhNkGBdjQOSXEKWf9xqOZEvB8Q6co1ySfu0= Received: by 10.213.17.80 with SMTP id r16mr1011828eba.131.1313526933789; Tue, 16 Aug 2011 13:35:33 -0700 (PDT) Received: from rob-laptop.i.smooth-stone.com ([173.226.190.126]) by mx.google.com with ESMTPS id x7sm259932eef.25.2011.08.16.13.35.31 (version=SSLv3 cipher=OTHER); Tue, 16 Aug 2011 13:35:32 -0700 (PDT) From: Rob Herring To: linux-arm-kernel@lists.infradead.org Subject: [PATCH 4/6] ARM: highbank: add SMP support Date: Tue, 16 Aug 2011 15:34:56 -0500 Message-Id: <1313526898-19920-5-git-send-email-robherring2@gmail.com> X-Mailer: git-send-email 1.7.4.1 In-Reply-To: <1313526898-19920-1-git-send-email-robherring2@gmail.com> References: <1313526898-19920-1-git-send-email-robherring2@gmail.com> X-CRM114-Version: 20090807-BlameThorstenAndJenny ( TRE 0.7.6 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20110816_163534_813503_4BAEFC48 X-CRM114-Status: GOOD ( 20.44 ) X-Spam-Score: -0.7 (/) X-Spam-Report: SpamAssassin version 3.3.1 on canuck.infradead.org summary: Content analysis details: (-0.7 points) pts rule name description ---- ---------------------- -------------------------------------------------- -0.7 RCVD_IN_DNSWL_LOW RBL: Sender listed at http://www.dnswl.org/, low trust [209.85.215.171 listed in list.dnswl.org] 0.0 FREEMAIL_FROM Sender email is commonly abused enduser mail provider (robherring2[at]gmail.com) 0.1 FREEMAIL_ENVFROM_END_DIGIT Envelope-from freemail username ends in digit (robherring2[at]gmail.com) -0.1 DKIM_VALID_AU Message has a valid DKIM or DK signature from author's domain 0.1 DKIM_SIGNED Message has a DKIM or DK signature, not necessarily valid -0.1 DKIM_VALID Message has at least one valid DKIM or DK signature 0.0 T_TO_NO_BRKTS_FREEMAIL To: misformatted and free email service Cc: Rob Herring X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.12 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: linux-arm-kernel-bounces@lists.infradead.org Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Greylist: IP, sender and recipient auto-whitelisted, not delayed by milter-greylist-4.2.6 (demeter2.kernel.org [140.211.167.43]); Tue, 16 Aug 2011 20:37:21 +0000 (UTC) From: Rob Herring This enables SMP support on highbank processor. Signed-off-by: Rob Herring --- arch/arm/Kconfig | 2 +- arch/arm/mach-highbank/Makefile | 2 + arch/arm/mach-highbank/localtimer.c | 37 ++++++++++++++++ arch/arm/mach-highbank/platsmp.c | 79 +++++++++++++++++++++++++++++++++++ 4 files changed, 119 insertions(+), 1 deletions(-) create mode 100644 arch/arm/mach-highbank/localtimer.c create mode 100644 arch/arm/mach-highbank/platsmp.c diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index eecee3d..51abd0c 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -1365,7 +1365,7 @@ config SMP depends on REALVIEW_EB_ARM11MP || REALVIEW_EB_A9MP || \ MACH_REALVIEW_PB11MP || MACH_REALVIEW_PBX || ARCH_OMAP4 || \ ARCH_EXYNOS4 || ARCH_TEGRA || ARCH_U8500 || ARCH_VEXPRESS_CA9X4 || \ - ARCH_MSM_SCORPIONMP || ARCH_SHMOBILE + ARCH_MSM_SCORPIONMP || ARCH_SHMOBILE || ARCH_HIGHBANK select USE_GENERIC_SMP_HELPERS select HAVE_ARM_SCU if !ARCH_MSM_SCORPIONMP help diff --git a/arch/arm/mach-highbank/Makefile b/arch/arm/mach-highbank/Makefile index b5de3b9..d443f7e 100644 --- a/arch/arm/mach-highbank/Makefile +++ b/arch/arm/mach-highbank/Makefile @@ -1 +1,3 @@ obj-y := clock.o highbank.o system.o +obj-$(CONFIG_SMP) += platsmp.o +obj-$(CONFIG_LOCAL_TIMERS) += localtimer.o diff --git a/arch/arm/mach-highbank/localtimer.c b/arch/arm/mach-highbank/localtimer.c new file mode 100644 index 0000000..ed54821 --- /dev/null +++ b/arch/arm/mach-highbank/localtimer.c @@ -0,0 +1,37 @@ +/* + * Copyright 2010-2011 Calxeda, Inc. + * Based on localtimer.c, Copyright (C) 2002 ARM Ltd. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + * + * You should have received a copy of the GNU General Public License along with + * this program. If not, see . + */ +#include +#include +#include +#include +#include + +#include + +/* + * Setup the local clock events for a CPU. + */ +int __cpuinit local_timer_setup(struct clock_event_device *evt) +{ + struct device_node *np; + + np = of_find_compatible_node(NULL, NULL, "arm,smp-twd"); + twd_base = of_iomap(np, 0); + evt->irq = irq_of_parse_and_map(np, 0); + twd_timer_setup(evt); + return 0; +} diff --git a/arch/arm/mach-highbank/platsmp.c b/arch/arm/mach-highbank/platsmp.c new file mode 100644 index 0000000..c582f5b --- /dev/null +++ b/arch/arm/mach-highbank/platsmp.c @@ -0,0 +1,79 @@ +/* + * Copyright 2010-2011 Calxeda, Inc. + * Based on platsmp.c, Copyright (C) 2002 ARM Ltd. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + * + * You should have received a copy of the GNU General Public License along with + * this program. If not, see . + */ +#include +#include +#include + +#include +#include + +#include "core.h" + +extern void secondary_startup(void); + +void __cpuinit platform_secondary_init(unsigned int cpu) +{ + gic_secondary_init(0); +} + +int __cpuinit boot_secondary(unsigned int cpu, struct task_struct *idle) +{ + gic_raise_softirq(cpumask_of(cpu), 1); + return 0; +} + +/* + * Initialise the CPU possible map early - this describes the CPUs + * which may be present or become present in the system. + */ +void __init smp_init_cpus(void) +{ + void __iomem *scu_base = a9_base_addr; + unsigned int i, ncores; + + ncores = scu_base ? scu_get_core_count(scu_base) : 1; + + /* sanity check */ + if (ncores > NR_CPUS) { + printk(KERN_WARNING + "highbank: no. of cores (%d) greater than configured " + "maximum of %d - clipping\n", + ncores, NR_CPUS); + ncores = NR_CPUS; + } + + for (i = 0; i < ncores; i++) + set_cpu_possible(i, true); + + set_smp_cross_call(gic_raise_softirq); +} + +void __init platform_smp_prepare_cpus(unsigned int max_cpus) +{ + int i; + + scu_enable(a9_base_addr); + + /* + * Write the address of secondary startup into the jump table + * The cores are in wfi and wait until they receive a soft interrupt + * and a non-zero value to jump to. Then the secondary CPU branches + * to this address. + */ + for (i = 1; i < max_cpus; i++) + highbank_set_cpu_jump(i, secondary_startup); +}