From patchwork Tue Aug 23 13:07:39 2011 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jason Liu X-Patchwork-Id: 1088552 Received: from merlin.infradead.org (merlin.infradead.org [205.233.59.134]) by demeter2.kernel.org (8.14.4/8.14.4) with ESMTP id p7ND5mPI017190 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-SHA bits=256 verify=NO) for ; Tue, 23 Aug 2011 13:06:09 GMT Received: from canuck.infradead.org ([2001:4978:20e::1]) by merlin.infradead.org with esmtps (Exim 4.76 #1 (Red Hat Linux)) id 1QvqfM-0001Mx-IX; Tue, 23 Aug 2011 13:05:17 +0000 Received: from localhost ([127.0.0.1] helo=canuck.infradead.org) by canuck.infradead.org with esmtp (Exim 4.76 #1 (Red Hat Linux)) id 1QvqfK-0001OF-W6; Tue, 23 Aug 2011 13:05:15 +0000 Received: from am1ehsobe002.messaging.microsoft.com ([213.199.154.205] helo=AM1EHSOBE002.bigfish.com) by canuck.infradead.org with esmtps (Exim 4.76 #1 (Red Hat Linux)) id 1Qvqez-0001Gg-6d for linux-arm-kernel@lists.infradead.org; Tue, 23 Aug 2011 13:04:54 +0000 Received: from mail28-am1-R.bigfish.com (10.3.201.247) by AM1EHSOBE002.bigfish.com (10.3.204.22) with Microsoft SMTP Server id 14.1.225.22; Tue, 23 Aug 2011 13:04:49 +0000 Received: from mail28-am1 (localhost.localdomain [127.0.0.1]) by mail28-am1-R.bigfish.com (Postfix) with ESMTP id 1373AFE0330; Tue, 23 Aug 2011 13:04:50 +0000 (UTC) X-SpamScore: 7 X-BigFish: VS7(z1039ozzz1202hzz8275bhz2dh87h2a8h668h839h61h) X-Spam-TCS-SCL: 0:0 X-Forefront-Antispam-Report: CIP:70.37.183.190; KIP:(null); UIP:(null); IPVD:NLI; H:mail.freescale.net; RD:none; EFVD:NLI X-FB-DOMAIN-IP-MATCH: fail Received: from mail28-am1 (localhost.localdomain [127.0.0.1]) by mail28-am1 (MessageSwitch) id 1314104658585636_1784; Tue, 23 Aug 2011 13:04:18 +0000 (UTC) Received: from AM1EHSMHS016.bigfish.com (unknown [10.3.201.242]) by mail28-am1.bigfish.com (Postfix) with ESMTP id DE59A1098106; Tue, 23 Aug 2011 13:02:42 +0000 (UTC) Received: from mail.freescale.net (70.37.183.190) by AM1EHSMHS016.bigfish.com (10.3.207.154) with Microsoft SMTP Server (TLS) id 14.1.225.22; Tue, 23 Aug 2011 13:02:38 +0000 Received: from az33smr01.freescale.net (10.64.34.199) by 039-SN1MMR1-002.039d.mgd.msft.net (10.84.1.15) with Microsoft SMTP Server id 14.1.323.2; Tue, 23 Aug 2011 08:02:36 -0500 Received: from r64343-desktop.ap.freescale.net (r64343-desktop.ap.freescale.net [10.192.242.36]) by az33smr01.freescale.net (8.13.1/8.13.0) with ESMTP id p7ND2Wd2022085; Tue, 23 Aug 2011 08:02:35 -0500 (CDT) From: Jason Liu To: Subject: [PATCH 1/6] ARM: imx: Introduce generic function for displaying silicon revision Date: Tue, 23 Aug 2011 21:07:39 +0800 Message-ID: <1314104864-3725-2-git-send-email-jason.hui@linaro.org> X-Mailer: git-send-email 1.7.4.1 In-Reply-To: <1314104864-3725-1-git-send-email-jason.hui@linaro.org> References: <1314104864-3725-1-git-send-email-jason.hui@linaro.org> MIME-Version: 1.0 X-OriginatorOrg: sigmatel.com X-CRM114-Version: 20090807-BlameThorstenAndJenny ( TRE 0.7.6 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20110823_090453_605367_2B12F86E X-CRM114-Status: GOOD ( 14.45 ) X-Spam-Score: -0.7 (/) X-Spam-Report: SpamAssassin version 3.3.1 on canuck.infradead.org summary: Content analysis details: (-0.7 points) pts rule name description ---- ---------------------- -------------------------------------------------- -0.7 RCVD_IN_DNSWL_LOW RBL: Sender listed at http://www.dnswl.org/, low trust [213.199.154.205 listed in list.dnswl.org] Cc: s.hauer@pengutronix.de, patches@linaro.org X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.12 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: linux-arm-kernel-bounces@lists.infradead.org Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Greylist: IP, sender and recipient auto-whitelisted, not delayed by milter-greylist-4.2.6 (demeter2.kernel.org [140.211.167.43]); Tue, 23 Aug 2011 13:06:09 +0000 (UTC) From: Fabio Estevam Currently each i.MX processor has its own function for displaying the silicon revision. Introduce a generic function for this purpose, so that all i.MX processors can reuse it. Signed-off-by: Fabio Estevam --- arch/arm/plat-mxc/cpu.c | 10 ++++++++++ arch/arm/plat-mxc/include/mach/common.h | 1 + 2 files changed, 11 insertions(+), 0 deletions(-) diff --git a/arch/arm/plat-mxc/cpu.c b/arch/arm/plat-mxc/cpu.c index 386e0d5..f081ef0 100644 --- a/arch/arm/plat-mxc/cpu.c +++ b/arch/arm/plat-mxc/cpu.c @@ -1,5 +1,6 @@ #include +#include unsigned int __mxc_cpu_type; EXPORT_SYMBOL(__mxc_cpu_type); @@ -9,3 +10,12 @@ void mxc_set_cpu_type(unsigned int type) __mxc_cpu_type = type; } +void imx_print_silicon_rev(const char *cpu, int srev) +{ + if (srev == IMX_CHIP_REVISION_UNKNOWN) + pr_info("CPU identified as %s, unknown revision\n", cpu); + else + pr_info("CPU identified as %s, silicon rev %d.%d\n", + cpu, (srev >> 4) & 0xf, srev & 0xf); +} +EXPORT_SYMBOL(imx_print_silicon_rev); diff --git a/arch/arm/plat-mxc/include/mach/common.h b/arch/arm/plat-mxc/include/mach/common.h index 4e3d978..318e0da 100644 --- a/arch/arm/plat-mxc/include/mach/common.h +++ b/arch/arm/plat-mxc/include/mach/common.h @@ -72,4 +72,5 @@ extern void mxc_arch_reset_init(void __iomem *); extern void mx51_efikamx_reset(void); extern int mx53_revision(void); extern int mx53_display_revision(void); +extern void imx_print_silicon_rev(const char *cpu, int srev); #endif