From patchwork Thu Aug 25 11:52:36 2011 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Fabio Estevam X-Patchwork-Id: 1096142 Received: from merlin.infradead.org (merlin.infradead.org [205.233.59.134]) by demeter1.kernel.org (8.14.4/8.14.4) with ESMTP id p7PBfmYo012675 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-SHA bits=256 verify=NO) for ; Thu, 25 Aug 2011 11:42:09 GMT Received: from canuck.infradead.org ([2001:4978:20e::1]) by merlin.infradead.org with esmtps (Exim 4.76 #1 (Red Hat Linux)) id 1QwYJP-0000X6-4R; Thu, 25 Aug 2011 11:41:31 +0000 Received: from localhost ([127.0.0.1] helo=canuck.infradead.org) by canuck.infradead.org with esmtp (Exim 4.76 #1 (Red Hat Linux)) id 1QwYJO-0000me-MJ; Thu, 25 Aug 2011 11:41:30 +0000 Received: from db3ehsobe002.messaging.microsoft.com ([213.199.154.140] helo=DB3EHSOBE002.bigfish.com) by canuck.infradead.org with esmtps (Exim 4.76 #1 (Red Hat Linux)) id 1QwYJK-0000mL-DM for linux-arm-kernel@lists.infradead.org; Thu, 25 Aug 2011 11:41:27 +0000 Received: from mail92-db3-R.bigfish.com (10.3.81.241) by DB3EHSOBE002.bigfish.com (10.3.84.22) with Microsoft SMTP Server id 14.1.225.22; Thu, 25 Aug 2011 11:41:23 +0000 Received: from mail92-db3 (localhost.localdomain [127.0.0.1]) by mail92-db3-R.bigfish.com (Postfix) with ESMTP id E10291A30379; Thu, 25 Aug 2011 11:41:23 +0000 (UTC) X-SpamScore: 0 X-BigFish: VS0(zzzz1202hzz8275bhz2dh2a8h668h839h61h) X-Spam-TCS-SCL: 0:0 X-Forefront-Antispam-Report: CIP:70.37.183.190; KIP:(null); UIP:(null); IPVD:NLI; H:mail.freescale.net; RD:none; EFVD:NLI Received: from mail92-db3 (localhost.localdomain [127.0.0.1]) by mail92-db3 (MessageSwitch) id 1314272483597320_31533; Thu, 25 Aug 2011 11:41:23 +0000 (UTC) Received: from DB3EHSMHS015.bigfish.com (unknown [10.3.81.241]) by mail92-db3.bigfish.com (Postfix) with ESMTP id 8B26514A0050; Thu, 25 Aug 2011 11:41:23 +0000 (UTC) Received: from mail.freescale.net (70.37.183.190) by DB3EHSMHS015.bigfish.com (10.3.87.115) with Microsoft SMTP Server (TLS) id 14.1.225.22; Thu, 25 Aug 2011 11:41:22 +0000 Received: from az33smr02.freescale.net (10.64.34.200) by 039-SN1MMR1-002.039d.mgd.msft.net (10.84.1.15) with Microsoft SMTP Server id 14.1.323.2; Thu, 25 Aug 2011 06:41:20 -0500 Received: from localhost.localdomain ([10.29.240.182]) by az33smr02.freescale.net (8.13.1/8.13.0) with ESMTP id p7PBfI40019513; Thu, 25 Aug 2011 06:41:18 -0500 (CDT) From: Fabio Estevam To: Subject: [PATCH] ARM: imx: Remove unused chip revision strings Date: Thu, 25 Aug 2011 08:52:36 -0300 Message-ID: <1314273156-14916-1-git-send-email-fabio.estevam@freescale.com> X-Mailer: git-send-email 1.6.0.4 MIME-Version: 1.0 X-OriginatorOrg: freescale.com X-CRM114-Version: 20090807-BlameThorstenAndJenny ( TRE 0.7.6 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20110825_074126_673121_F75FFCD5 X-CRM114-Status: GOOD ( 11.99 ) X-Spam-Score: -0.7 (/) X-Spam-Report: SpamAssassin version 3.3.1 on canuck.infradead.org summary: Content analysis details: (-0.7 points) pts rule name description ---- ---------------------- -------------------------------------------------- -0.7 RCVD_IN_DNSWL_LOW RBL: Sender listed at http://www.dnswl.org/, low trust [213.199.154.140 listed in list.dnswl.org] Cc: Fabio Estevam , kernel@pengutronix.de X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.12 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: linux-arm-kernel-bounces@lists.infradead.org Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Greylist: IP, sender and recipient auto-whitelisted, not delayed by milter-greylist-4.2.6 (demeter1.kernel.org [140.211.167.41]); Thu, 25 Aug 2011 11:42:27 +0000 (UTC) Since commit (167a19d2: ARM: imx: Introduce generic function for displaying silicon revision) we no longer need the chip revision strings, so remove them. Signed-off-by: Fabio Estevam --- arch/arm/plat-mxc/include/mach/mxc.h | 14 -------------- 1 files changed, 0 insertions(+), 14 deletions(-) diff --git a/arch/arm/plat-mxc/include/mach/mxc.h b/arch/arm/plat-mxc/include/mach/mxc.h index 0987923..ea28170 100644 --- a/arch/arm/plat-mxc/include/mach/mxc.h +++ b/arch/arm/plat-mxc/include/mach/mxc.h @@ -50,20 +50,6 @@ #define IMX_CHIP_REVISION_3_3 0x33 #define IMX_CHIP_REVISION_UNKNOWN 0xff -#define IMX_CHIP_REVISION_1_0_STRING "1.0" -#define IMX_CHIP_REVISION_1_1_STRING "1.1" -#define IMX_CHIP_REVISION_1_2_STRING "1.2" -#define IMX_CHIP_REVISION_1_3_STRING "1.3" -#define IMX_CHIP_REVISION_2_0_STRING "2.0" -#define IMX_CHIP_REVISION_2_1_STRING "2.1" -#define IMX_CHIP_REVISION_2_2_STRING "2.2" -#define IMX_CHIP_REVISION_2_3_STRING "2.3" -#define IMX_CHIP_REVISION_3_0_STRING "3.0" -#define IMX_CHIP_REVISION_3_1_STRING "3.1" -#define IMX_CHIP_REVISION_3_2_STRING "3.2" -#define IMX_CHIP_REVISION_3_3_STRING "3.3" -#define IMX_CHIP_REVISION_UNKNOWN_STRING "unknown" - #ifndef __ASSEMBLY__ extern unsigned int __mxc_cpu_type; #endif