From patchwork Thu Aug 25 15:24:28 2011 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Fabio Estevam X-Patchwork-Id: 1097152 Received: from merlin.infradead.org (merlin.infradead.org [205.233.59.134]) by demeter2.kernel.org (8.14.4/8.14.4) with ESMTP id p7PFE9nC019289 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-SHA bits=256 verify=NO) for ; Thu, 25 Aug 2011 15:14:29 GMT Received: from canuck.infradead.org ([2001:4978:20e::1]) by merlin.infradead.org with esmtps (Exim 4.76 #1 (Red Hat Linux)) id 1Qwbcs-0007ZI-Tf; Thu, 25 Aug 2011 15:13:51 +0000 Received: from localhost ([127.0.0.1] helo=canuck.infradead.org) by canuck.infradead.org with esmtp (Exim 4.76 #1 (Red Hat Linux)) id 1Qwbcs-0005CT-F4; Thu, 25 Aug 2011 15:13:50 +0000 Received: from tx2ehsobe004.messaging.microsoft.com ([65.55.88.14] helo=TX2EHSOBE008.bigfish.com) by canuck.infradead.org with esmtps (Exim 4.76 #1 (Red Hat Linux)) id 1Qwbcp-0005CA-5m for linux-arm-kernel@lists.infradead.org; Thu, 25 Aug 2011 15:13:47 +0000 Received: from mail91-tx2-R.bigfish.com (10.9.14.246) by TX2EHSOBE008.bigfish.com (10.9.40.28) with Microsoft SMTP Server id 14.1.225.22; Thu, 25 Aug 2011 15:13:44 +0000 Received: from mail91-tx2 (localhost.localdomain [127.0.0.1]) by mail91-tx2-R.bigfish.com (Postfix) with ESMTP id 49881A501E6; Thu, 25 Aug 2011 15:13:44 +0000 (UTC) X-SpamScore: 0 X-BigFish: VS0(zzzz1202hzz8275bhz2dh2a8h668h839h62h) X-Spam-TCS-SCL: 1:0 X-Forefront-Antispam-Report: CIP:70.37.183.190; KIP:(null); UIP:(null); IPVD:NLI; H:mail.freescale.net; RD:none; EFVD:NLI Received: from mail91-tx2 (localhost.localdomain [127.0.0.1]) by mail91-tx2 (MessageSwitch) id 1314285201798049_7706; Thu, 25 Aug 2011 15:13:21 +0000 (UTC) Received: from TX2EHSMHS014.bigfish.com (unknown [10.9.14.244]) by mail91-tx2.bigfish.com (Postfix) with ESMTP id 9097617B804B; Thu, 25 Aug 2011 15:13:21 +0000 (UTC) Received: from mail.freescale.net (70.37.183.190) by TX2EHSMHS014.bigfish.com (10.9.99.114) with Microsoft SMTP Server (TLS) id 14.1.225.22; Thu, 25 Aug 2011 15:13:11 +0000 Received: from az33smr02.freescale.net (10.64.34.200) by 039-SN1MMR1-001.039d.mgd.msft.net (10.84.1.13) with Microsoft SMTP Server id 14.1.323.2; Thu, 25 Aug 2011 10:13:11 -0500 Received: from localhost.localdomain ([10.29.240.182]) by az33smr02.freescale.net (8.13.1/8.13.0) with ESMTP id p7PFD9wv014128; Thu, 25 Aug 2011 10:13:09 -0500 (CDT) From: Fabio Estevam To: Subject: [PATCH] ARM: mx51: Fix chip revision detection Date: Thu, 25 Aug 2011 12:24:28 -0300 Message-ID: <1314285868-10782-1-git-send-email-fabio.estevam@freescale.com> X-Mailer: git-send-email 1.6.0.4 MIME-Version: 1.0 X-OriginatorOrg: freescale.com X-CRM114-Version: 20090807-BlameThorstenAndJenny ( TRE 0.7.6 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20110825_111347_350002_E22F2219 X-CRM114-Status: GOOD ( 15.19 ) X-Spam-Score: -2.3 (--) X-Spam-Report: SpamAssassin version 3.3.1 on canuck.infradead.org summary: Content analysis details: (-2.3 points) pts rule name description ---- ---------------------- -------------------------------------------------- -2.3 RCVD_IN_DNSWL_MED RBL: Sender listed at http://www.dnswl.org/, medium trust [65.55.88.14 listed in list.dnswl.org] Cc: Fabio Estevam , kernel@pengutronix.de X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.12 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: linux-arm-kernel-bounces@lists.infradead.org Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Greylist: IP, sender and recipient auto-whitelisted, not delayed by milter-greylist-4.2.6 (demeter2.kernel.org [140.211.167.43]); Thu, 25 Aug 2011 15:14:29 +0000 (UTC) Commit ca5f9dd9 (ARM: mx5: use generic function for displaying silicon revision) incorrectly changed the check value for MX51 TO3.0. Fix this so that MX51 TO3.0 can be correctly reported. Signed-off-by: Fabio Estevam --- arch/arm/mach-mx5/cpu.c | 2 +- 1 files changed, 1 insertions(+), 1 deletions(-) diff --git a/arch/arm/mach-mx5/cpu.c b/arch/arm/mach-mx5/cpu.c index df46967..5c53282 100644 --- a/arch/arm/mach-mx5/cpu.c +++ b/arch/arm/mach-mx5/cpu.c @@ -31,7 +31,7 @@ static int get_mx51_srev(void) switch (rev) { case 0x0: return IMX_CHIP_REVISION_2_0; - case 0x2: + case 0x10: return IMX_CHIP_REVISION_3_0; default: return IMX_CHIP_REVISION_UNKNOWN;