From patchwork Tue Aug 30 19:17:16 2011 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Stephen Warren X-Patchwork-Id: 1114052 Received: from merlin.infradead.org (merlin.infradead.org [205.233.59.134]) by demeter2.kernel.org (8.14.4/8.14.4) with ESMTP id p7UJIA9T012476 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-SHA bits=256 verify=NO) for ; Tue, 30 Aug 2011 19:18:32 GMT Received: from canuck.infradead.org ([2001:4978:20e::1]) by merlin.infradead.org with esmtps (Exim 4.76 #1 (Red Hat Linux)) id 1QyTok-0000Do-1o; Tue, 30 Aug 2011 19:17:50 +0000 Received: from localhost ([127.0.0.1] helo=canuck.infradead.org) by canuck.infradead.org with esmtp (Exim 4.76 #1 (Red Hat Linux)) id 1QyToi-0000lp-T0; Tue, 30 Aug 2011 19:17:48 +0000 Received: from avon.wwwdotorg.org ([2001:470:1f0f:bd7::2]) by canuck.infradead.org with esmtps (Exim 4.76 #1 (Red Hat Linux)) id 1QyToN-0000hu-BR for linux-arm-kernel@lists.infradead.org; Tue, 30 Aug 2011 19:17:28 +0000 Received: from severn.wwwdotorg.org (unknown [192.168.65.5]) (using TLSv1 with cipher ADH-AES256-SHA (256/256 bits)) (No client certificate requested) by avon.wwwdotorg.org (Postfix) with ESMTPS id 530C163F8; Tue, 30 Aug 2011 13:19:25 -0600 (MDT) Received: from localhost.localdomain (searspoint.nvidia.com [216.228.112.21]) (using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (No client certificate requested) by severn.wwwdotorg.org (Postfix) with ESMTPSA id 8EE81E4618; Tue, 30 Aug 2011 13:17:24 -0600 (MDT) From: Stephen Warren To: Chris Ball , Grant Likely Subject: [PATCH 2/3] mmc: sdhci-tegra: Add 8-bit support to device tree binding. Date: Tue, 30 Aug 2011 13:17:16 -0600 Message-Id: <1314731837-6985-2-git-send-email-swarren@nvidia.com> X-Mailer: git-send-email 1.7.0.4 In-Reply-To: <1314731837-6985-1-git-send-email-swarren@nvidia.com> References: <1314731837-6985-1-git-send-email-swarren@nvidia.com> X-Virus-Scanned: clamav-milter 0.96.5 at avon.wwwdotorg.org X-Virus-Status: Clean X-CRM114-Version: 20090807-BlameThorstenAndJenny ( TRE 0.7.6 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20110830_151727_645052_61CAFE8E X-CRM114-Status: GOOD ( 17.56 ) X-Spam-Score: 0.0 (/) X-Spam-Report: SpamAssassin version 3.3.1 on canuck.infradead.org summary: Content analysis details: (0.0 points) pts rule name description ---- ---------------------- -------------------------------------------------- Cc: Stephen Warren , devicetree-discuss@lists.ozlabs.org, linux-mmc@vger.kernel.org, linux-kernel@vger.kernel.org, linux-tegra@vger.kernel.org, Olof Johansson , Shawn Guo , linux-arm-kernel@lists.infradead.org X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.12 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: linux-arm-kernel-bounces@lists.infradead.org Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Greylist: IP, sender and recipient auto-whitelisted, not delayed by milter-greylist-4.2.6 (demeter2.kernel.org [140.211.167.43]); Tue, 30 Aug 2011 19:18:32 +0000 (UTC) The previous patch which implemented a DT binding for sdhci-tegra did not allow all platform data fields to be initialized from DT. The following were missing: is_8bit: Implemented by this patch. pm_flags: Not implemented yet. There are no mainline users of this field. I'm not quite sure what it's for, and hence how to represent this in DT; the value ends up being assigned to host->mmc->pm_caps. While we're at it, fix the binding documentation to refer to "SD/MMC" instead of "eSDHC", since that's the correct name; "eSDHC" was cut/paste from the Freescale binding docs. Signed-off-by: Stephen Warren --- This should be able to go straight into the MMC -next branch .../devicetree/bindings/mmc/nvidia-sdhci.txt | 6 ++++-- drivers/mmc/host/sdhci-tegra.c | 3 +++ 2 files changed, 7 insertions(+), 2 deletions(-) diff --git a/Documentation/devicetree/bindings/mmc/nvidia-sdhci.txt b/Documentation/devicetree/bindings/mmc/nvidia-sdhci.txt index c87f667..7e51154 100644 --- a/Documentation/devicetree/bindings/mmc/nvidia-sdhci.txt +++ b/Documentation/devicetree/bindings/mmc/nvidia-sdhci.txt @@ -5,13 +5,14 @@ and SDIO types of memory cards. Required properties: - compatible : Should be "nvidia,-sdhci" -- reg : Should contain eSDHC registers location and length -- interrupts : Should contain eSDHC interrupt +- reg : Should contain SD/MMC registers location and length +- interrupts : Should contain SD/MMC interrupt Optional properties: - cd-gpios : Specify GPIOs for card detection - wp-gpios : Specify GPIOs for write protection - power-gpios : Specify GPIOs for power control +- support-8bit : Boolean, indicates if 8-bit mode should be used. Example: @@ -22,4 +23,5 @@ sdhci@c8000200 { cd-gpios = <&gpio 69 0>; /* gpio PI5 */ wp-gpios = <&gpio 57 0>; /* gpio PH1 */ power-gpios = <&gpio 155 0>; /* gpio PT3 */ + support-8bit; }; diff --git a/drivers/mmc/host/sdhci-tegra.c b/drivers/mmc/host/sdhci-tegra.c index 9ab18d6..67176af 100644 --- a/drivers/mmc/host/sdhci-tegra.c +++ b/drivers/mmc/host/sdhci-tegra.c @@ -17,6 +17,7 @@ #include #include #include +#include #include #include #include @@ -153,6 +154,8 @@ static struct tegra_sdhci_platform_data * __devinit sdhci_tegra_dt_parse_pdata( plat->cd_gpio = of_get_named_gpio(np, "cd-gpios", 0); plat->wp_gpio = of_get_named_gpio(np, "wp-gpios", 0); plat->power_gpio = of_get_named_gpio(np, "power-gpios", 0); + if (of_find_property(np, "support-8bit", NULL)) + plat->is_8bit = 1; return plat; }