From patchwork Wed Aug 31 21:30:14 2011 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Mark Salter X-Patchwork-Id: 1117912 Received: from merlin.infradead.org (merlin.infradead.org [205.233.59.134]) by demeter1.kernel.org (8.14.4/8.14.4) with ESMTP id p7VLddDb024661 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-SHA bits=256 verify=NO) for ; Wed, 31 Aug 2011 21:40:01 GMT Received: from canuck.infradead.org ([2001:4978:20e::1]) by merlin.infradead.org with esmtps (Exim 4.76 #1 (Red Hat Linux)) id 1QysUG-0005LP-ST; Wed, 31 Aug 2011 21:38:21 +0000 Received: from localhost ([127.0.0.1] helo=canuck.infradead.org) by canuck.infradead.org with esmtp (Exim 4.76 #1 (Red Hat Linux)) id 1QysUG-0001eQ-2q; Wed, 31 Aug 2011 21:38:20 +0000 Received: from mx1.redhat.com ([209.132.183.28]) by canuck.infradead.org with esmtp (Exim 4.76 #1 (Red Hat Linux)) id 1QysMf-0007zW-DW for linux-arm-kernel@lists.infradead.org; Wed, 31 Aug 2011 21:30:33 +0000 Received: from int-mx01.intmail.prod.int.phx2.redhat.com (int-mx01.intmail.prod.int.phx2.redhat.com [10.5.11.11]) by mx1.redhat.com (8.14.4/8.14.4) with ESMTP id p7VLUREM004571 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-SHA bits=256 verify=OK); Wed, 31 Aug 2011 17:30:27 -0400 Received: from deneb.redhat.com (ovpn-113-34.phx2.redhat.com [10.3.113.34]) by int-mx01.intmail.prod.int.phx2.redhat.com (8.13.8/8.13.8) with ESMTP id p7VLUO09018097; Wed, 31 Aug 2011 17:30:26 -0400 From: Mark Salter To: linux-kernel@vger.kernel.org Subject: [PATCH 3/3] add dma_coherent_write_sync calls to USB EHCI driver Date: Wed, 31 Aug 2011 17:30:14 -0400 Message-Id: <1314826214-22428-4-git-send-email-msalter@redhat.com> In-Reply-To: <1314826214-22428-1-git-send-email-msalter@redhat.com> References: <1314826214-22428-1-git-send-email-msalter@redhat.com> X-Scanned-By: MIMEDefang 2.67 on 10.5.11.11 X-CRM114-Version: 20090807-BlameThorstenAndJenny ( TRE 0.7.6 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20110831_173029_856111_266E38D3 X-CRM114-Status: GOOD ( 17.30 ) X-Spam-Score: -5.5 (-----) X-Spam-Report: SpamAssassin version 3.3.1 on canuck.infradead.org summary: Content analysis details: (-5.5 points) pts rule name description ---- ---------------------- -------------------------------------------------- -5.0 RCVD_IN_DNSWL_HI RBL: Sender listed at http://www.dnswl.org/, high trust [209.132.183.28 listed in list.dnswl.org] -0.5 RP_MATCHES_RCVD Envelope sender domain matches handover relay domain Cc: ming.lei@canonical.com, stern@rowland.harvard.edu, linux-arm-kernel@lists.infradead.org, Mark Salter X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.12 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: linux-arm-kernel-bounces@lists.infradead.org Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Greylist: IP, sender and recipient auto-whitelisted, not delayed by milter-greylist-4.2.6 (demeter1.kernel.org [140.211.167.41]); Wed, 31 Aug 2011 21:40:01 +0000 (UTC) The EHCI driver polls DMA coherent memory for control data written by the driver. On some architectures, such as ARMv7, the writes from the driver may get delayed in a write buffer even though it is written to DMA coherent memory. This delay led to serious performance issues on an ARMv7 based platform using a USB disk drive. Before using this patch, 'hdparm -t' showed a read speed of 5.7MB/s. After applying this patch, hdparm showed 23.5MB/s. Signed-off-by: Mark Salter --- drivers/usb/host/ehci-q.c | 7 ++++++- 1 files changed, 6 insertions(+), 1 deletions(-) diff --git a/drivers/usb/host/ehci-q.c b/drivers/usb/host/ehci-q.c index 0917e3a..75d9838 100644 --- a/drivers/usb/host/ehci-q.c +++ b/drivers/usb/host/ehci-q.c @@ -114,6 +114,7 @@ qh_update (struct ehci_hcd *ehci, struct ehci_qh *qh, struct ehci_qtd *qtd) /* HC must see latest qtd and qh data before we clear ACTIVE+HALT */ wmb (); hw->hw_token &= cpu_to_hc32(ehci, QTD_TOGGLE | QTD_STS_PING); + dma_coherent_write_sync(); } /* if it weren't for a common silicon quirk (writing the dummy into the qh @@ -404,6 +405,7 @@ qh_completions (struct ehci_hcd *ehci, struct ehci_qh *qh) wmb(); hw->hw_token = cpu_to_hc32(ehci, token); + dma_coherent_write_sync(); goto retry_xacterr; } stopped = 1; @@ -753,8 +755,10 @@ qh_urb_transaction ( } /* by default, enable interrupt on urb completion */ - if (likely (!(urb->transfer_flags & URB_NO_INTERRUPT))) + if (likely(!(urb->transfer_flags & URB_NO_INTERRUPT))) { qtd->hw_token |= cpu_to_hc32(ehci, QTD_IOC); + dma_coherent_write_sync(); + } return head; cleanup: @@ -1081,6 +1085,7 @@ static struct ehci_qh *qh_append_tds ( /* let the hc process these next qtds */ wmb (); dummy->hw_token = token; + dma_coherent_write_sync(); urb->hcpriv = qh_get (qh); }