From patchwork Tue Sep 6 05:48:26 2011 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Shawn Guo X-Patchwork-Id: 1125582 Received: from merlin.infradead.org (merlin.infradead.org [205.233.59.134]) by demeter1.kernel.org (8.14.4/8.14.4) with ESMTP id p865nBGo031915 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-SHA bits=256 verify=NO) for ; Tue, 6 Sep 2011 05:49:32 GMT Received: from canuck.infradead.org ([2001:4978:20e::1]) by merlin.infradead.org with esmtps (Exim 4.76 #1 (Red Hat Linux)) id 1R0oWD-0003oE-GN; Tue, 06 Sep 2011 05:48:22 +0000 Received: from localhost ([127.0.0.1] helo=canuck.infradead.org) by canuck.infradead.org with esmtp (Exim 4.76 #1 (Red Hat Linux)) id 1R0oWD-0002Vq-3z; Tue, 06 Sep 2011 05:48:21 +0000 Received: from mail-pz0-f41.google.com ([209.85.210.41]) by canuck.infradead.org with esmtps (Exim 4.76 #1 (Red Hat Linux)) id 1R0oVw-0002SL-KE for linux-arm-kernel@lists.infradead.org; Tue, 06 Sep 2011 05:48:05 +0000 Received: by mail-pz0-f41.google.com with SMTP id 4so12702616pzk.28 for ; Mon, 05 Sep 2011 22:48:04 -0700 (PDT) Received: by 10.68.48.132 with SMTP id l4mr7416845pbn.78.1315288084211; Mon, 05 Sep 2011 22:48:04 -0700 (PDT) Received: from localhost.localdomain ([114.216.158.82]) by mx.google.com with ESMTPS id x6sm27429399pba.5.2011.09.05.22.47.58 (version=TLSv1/SSLv3 cipher=OTHER); Mon, 05 Sep 2011 22:48:03 -0700 (PDT) From: Shawn Guo To: Russell King Subject: [PATCH v2 1/2] ARM: cache-l2x0: remove __init annotation from initialization functions Date: Tue, 6 Sep 2011 13:48:26 +0800 Message-Id: <1315288107-14689-2-git-send-email-shawn.guo@linaro.org> X-Mailer: git-send-email 1.7.4.1 In-Reply-To: <1315288107-14689-1-git-send-email-shawn.guo@linaro.org> References: <1315288107-14689-1-git-send-email-shawn.guo@linaro.org> X-CRM114-Version: 20090807-BlameThorstenAndJenny ( TRE 0.7.6 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20110906_014804_789993_6D7D7778 X-CRM114-Status: GOOD ( 13.61 ) X-Spam-Score: -0.7 (/) X-Spam-Report: SpamAssassin version 3.3.1 on canuck.infradead.org summary: Content analysis details: (-0.7 points) pts rule name description ---- ---------------------- -------------------------------------------------- -0.7 RCVD_IN_DNSWL_LOW RBL: Sender listed at http://www.dnswl.org/, low trust [209.85.210.41 listed in list.dnswl.org] Cc: Shawn Guo , linux-arm-kernel@lists.infradead.org, patches@linaro.org X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.12 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: linux-arm-kernel-bounces@lists.infradead.org Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Greylist: IP, sender and recipient auto-whitelisted, not delayed by milter-greylist-4.2.6 (demeter1.kernel.org [140.211.167.41]); Tue, 06 Sep 2011 05:49:32 +0000 (UTC) If ARM core gets powered off during suspend, L2 cache controller has to be reinitialized by resume procedure. The patch removes __init annotation from a few initialization functions to make the reinitialization possible. For example, platform resume function can call l2x0_of_init() to get L2 cache back to work. Signed-off-by: Shawn Guo --- arch/arm/include/asm/hardware/cache-l2x0.h | 2 +- arch/arm/mm/cache-l2x0.c | 10 +++++----- 2 files changed, 6 insertions(+), 6 deletions(-) diff --git a/arch/arm/include/asm/hardware/cache-l2x0.h b/arch/arm/include/asm/hardware/cache-l2x0.h index d22765c..d270310 100644 --- a/arch/arm/include/asm/hardware/cache-l2x0.h +++ b/arch/arm/include/asm/hardware/cache-l2x0.h @@ -89,7 +89,7 @@ #define L2X0_ADDR_FILTER_EN 1 #ifndef __ASSEMBLY__ -extern void __init l2x0_init(void __iomem *base, __u32 aux_val, __u32 aux_mask); +extern void l2x0_init(void __iomem *base, __u32 aux_val, __u32 aux_mask); #if defined(CONFIG_CACHE_L2X0) && defined(CONFIG_OF) extern int l2x0_of_init(__u32 aux_val, __u32 aux_mask); #else diff --git a/arch/arm/mm/cache-l2x0.c b/arch/arm/mm/cache-l2x0.c index c035b9a..7835cb6 100644 --- a/arch/arm/mm/cache-l2x0.c +++ b/arch/arm/mm/cache-l2x0.c @@ -280,7 +280,7 @@ static void l2x0_disable(void) spin_unlock_irqrestore(&l2x0_lock, flags); } -void __init l2x0_init(void __iomem *base, __u32 aux_val, __u32 aux_mask) +void l2x0_init(void __iomem *base, __u32 aux_val, __u32 aux_mask) { __u32 aux; __u32 cache_id; @@ -356,7 +356,7 @@ void __init l2x0_init(void __iomem *base, __u32 aux_val, __u32 aux_mask) } #ifdef CONFIG_OF -static void __init l2x0_of_setup(const struct device_node *np, +static void l2x0_of_setup(const struct device_node *np, __u32 *aux_val, __u32 *aux_mask) { u32 data[2] = { 0, 0 }; @@ -390,7 +390,7 @@ static void __init l2x0_of_setup(const struct device_node *np, *aux_mask &= ~mask; } -static void __init pl310_of_setup(const struct device_node *np, +static void pl310_of_setup(const struct device_node *np, __u32 *aux_val, __u32 *aux_mask) { u32 data[3] = { 0, 0, 0 }; @@ -424,14 +424,14 @@ static void __init pl310_of_setup(const struct device_node *np, } } -static const struct of_device_id l2x0_ids[] __initconst = { +static const struct of_device_id l2x0_ids[] = { { .compatible = "arm,pl310-cache", .data = pl310_of_setup }, { .compatible = "arm,l220-cache", .data = l2x0_of_setup }, { .compatible = "arm,l210-cache", .data = l2x0_of_setup }, {} }; -int __init l2x0_of_init(__u32 aux_val, __u32 aux_mask) +int l2x0_of_init(__u32 aux_val, __u32 aux_mask) { struct device_node *np; void (*l2_setup)(const struct device_node *np,