From patchwork Thu Sep 8 12:04:40 2011 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Koyamangalath, Abhilash" X-Patchwork-Id: 1129432 Received: from merlin.infradead.org (merlin.infradead.org [205.233.59.134]) by demeter1.kernel.org (8.14.4/8.14.4) with ESMTP id p88C5CUT021924 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-SHA bits=256 verify=NO) for ; Thu, 8 Sep 2011 12:05:33 GMT Received: from canuck.infradead.org ([2001:4978:20e::1]) by merlin.infradead.org with esmtps (Exim 4.76 #1 (Red Hat Linux)) id 1R1dLl-0001de-QD; Thu, 08 Sep 2011 12:04:58 +0000 Received: from localhost ([127.0.0.1] helo=canuck.infradead.org) by canuck.infradead.org with esmtp (Exim 4.76 #1 (Red Hat Linux)) id 1R1dLl-0004IZ-1O; Thu, 08 Sep 2011 12:04:57 +0000 Received: from bear.ext.ti.com ([192.94.94.41]) by canuck.infradead.org with esmtps (Exim 4.76 #1 (Red Hat Linux)) id 1R1dLd-0004Gy-4z for linux-arm-kernel@lists.infradead.org; Thu, 08 Sep 2011 12:04:50 +0000 Received: from dbdp20.itg.ti.com ([172.24.170.38]) by bear.ext.ti.com (8.13.7/8.13.7) with ESMTP id p88C4fe8002915 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-SHA bits=256 verify=NO); Thu, 8 Sep 2011 07:04:43 -0500 Received: from dbde70.ent.ti.com (localhost [127.0.0.1]) by dbdp20.itg.ti.com (8.13.8/8.13.8) with ESMTP id p88C4fFo018086; Thu, 8 Sep 2011 17:34:41 +0530 (IST) Received: from dbdp31.itg.ti.com (172.24.170.98) by DBDE70.ent.ti.com (172.24.170.148) with Microsoft SMTP Server id 8.3.106.1; Thu, 8 Sep 2011 17:34:40 +0530 Received: from psplinux051.india.ti.com (psplinux051.india.ti.com [172.24.162.244]) by dbdp31.itg.ti.com (8.13.8/8.13.8) with ESMTP id p88C4epZ021255; Thu, 8 Sep 2011 17:34:40 +0530 (IST) Received: from psplinux051.india.ti.com (localhost [127.0.0.1]) by psplinux051.india.ti.com (8.13.1/8.13.1) with ESMTP id p88C4e4F017537; Thu, 8 Sep 2011 17:34:40 +0530 Received: (from x0151633@localhost) by psplinux051.india.ti.com (8.13.1/8.13.1/Submit) id p88C4er7017534; Thu, 8 Sep 2011 17:34:40 +0530 From: Abhilash K V To: Subject: [PATCH v3 1/2] AM35x: Using OMAP3 generic hwmods Date: Thu, 8 Sep 2011 17:34:40 +0530 Message-ID: <1315483480-17505-1-git-send-email-abhilash.kv@ti.com> X-Mailer: git-send-email 1.6.2.4 MIME-Version: 1.0 X-CRM114-Version: 20090807-BlameThorstenAndJenny ( TRE 0.7.6 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20110908_080449_369709_6FA8A825 X-CRM114-Status: GOOD ( 16.65 ) X-Spam-Score: -2.8 (--) X-Spam-Report: SpamAssassin version 3.3.1 on canuck.infradead.org summary: Content analysis details: (-2.8 points) pts rule name description ---- ---------------------- -------------------------------------------------- -2.3 RCVD_IN_DNSWL_MED RBL: Sender listed at http://www.dnswl.org/, medium trust [192.94.94.41 listed in list.dnswl.org] -0.5 RP_MATCHES_RCVD Envelope sender domain matches handover relay domain Cc: khilman@ti.com, paul@pwsan.com, linux@arm.linux.org.uk, b-cousson@ti.com, tony@atomide.com, linux-kernel@vger.kernel.org, Abhilash K V , linux-arm-kernel@lists.infradead.org X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.12 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: linux-arm-kernel-bounces@lists.infradead.org Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Greylist: IP, sender and recipient auto-whitelisted, not delayed by milter-greylist-4.2.6 (demeter1.kernel.org [140.211.167.41]); Thu, 08 Sep 2011 12:05:33 +0000 (UTC) This patch enables AM35x SoCs to use generic OMAP3 hwmods (i,e. omap3xxx_hwmods) by allowing am35xx_init_early() to disable the modules which are not present in AM3517. Reviewed-by: Sanjeev Premi Signed-off-by: Abhilash K V --- arch/arm/mach-omap2/io.c | 11 +++++++++++ arch/arm/mach-omap2/omap_hwmod.c | 3 ++- arch/arm/mach-omap2/omap_hwmod_3xxx_data.c | 18 ++++++++++++++++++ arch/arm/plat-omap/include/plat/omap_hwmod.h | 3 +++ 4 files changed, 34 insertions(+), 1 deletions(-) diff --git a/arch/arm/mach-omap2/io.c b/arch/arm/mach-omap2/io.c index 132724c..135e894 100644 --- a/arch/arm/mach-omap2/io.c +++ b/arch/arm/mach-omap2/io.c @@ -239,6 +239,16 @@ static struct map_desc omap44xx_io_desc[] __initdata = { }; #endif +static char *am3517_unused_hwmods[] = { + "iva", + "sr1_hwmod", + "sr2_hwmod", + "mailbox", + "usb_otg_hs", + NULL, +}; + + static void __init _omap2_map_common_io(void) { /* Normally devicemaps_init() would flush caches and tlb after @@ -427,6 +437,7 @@ void __init omap3630_init_early(void) void __init am35xx_init_early(void) { + omap2_disable_unused_hwmods(am3517_unused_hwmods); omap2_init_common_infrastructure(); } diff --git a/arch/arm/mach-omap2/omap_hwmod.c b/arch/arm/mach-omap2/omap_hwmod.c index 84cc0bd..bb765b5 100644 --- a/arch/arm/mach-omap2/omap_hwmod.c +++ b/arch/arm/mach-omap2/omap_hwmod.c @@ -1954,7 +1954,8 @@ int __init omap_hwmod_register(struct omap_hwmod **ohs) i = 0; do { - if (!omap_chip_is(ohs[i]->omap_chip)) + if (!omap_chip_is(ohs[i]->omap_chip) + || (ohs[i]->flags & HWMOD_UNUSED)) continue; r = _register(ohs[i]); diff --git a/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c b/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c index 25bf43b..5c282bb 100644 --- a/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c +++ b/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c @@ -3281,6 +3281,24 @@ static __initdata struct omap_hwmod *omap3xxx_hwmods[] = { NULL, }; +void __init omap2_disable_unused_hwmods(char *unused_hwmods[]) +{ + int index; + + for (index = 0; omap3xxx_hwmods[index]; index++) { + char **hwmods = unused_hwmods; + while (*hwmods) { + if (strcmp(omap3xxx_hwmods[index]->name, + *hwmods) == 0) { + omap3xxx_hwmods[index]->flags + = HWMOD_UNUSED; + break; + } + hwmods++; + } + } +} + int __init omap3xxx_hwmod_init(void) { return omap_hwmod_register(omap3xxx_hwmods); diff --git a/arch/arm/plat-omap/include/plat/omap_hwmod.h b/arch/arm/plat-omap/include/plat/omap_hwmod.h index 0e329ca..490a95a 100644 --- a/arch/arm/plat-omap/include/plat/omap_hwmod.h +++ b/arch/arm/plat-omap/include/plat/omap_hwmod.h @@ -398,6 +398,7 @@ struct omap_hwmod_omap4_prcm { * in order to complete the reset. Optional clocks will be disabled * again after the reset. * HWMOD_16BIT_REG: Module has 16bit registers + * HWMOD_UNUSED: The IP for this module is unused or disabled on current SoC */ #define HWMOD_SWSUP_SIDLE (1 << 0) #define HWMOD_SWSUP_MSTANDBY (1 << 1) @@ -408,6 +409,7 @@ struct omap_hwmod_omap4_prcm { #define HWMOD_NO_IDLEST (1 << 6) #define HWMOD_CONTROL_OPT_CLKS_IN_RESET (1 << 7) #define HWMOD_16BIT_REG (1 << 8) +#define HWMOD_UNUSED (1 << 9) /* * omap_hwmod._int_flags definitions @@ -615,5 +617,6 @@ extern int omap2420_hwmod_init(void); extern int omap2430_hwmod_init(void); extern int omap3xxx_hwmod_init(void); extern int omap44xx_hwmod_init(void); +extern void omap2_disable_unused_hwmods(char *unused_hwmods[]); #endif