From patchwork Thu Sep 8 12:48:04 2011 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Koyamangalath, Abhilash" X-Patchwork-Id: 1129572 Received: from merlin.infradead.org (merlin.infradead.org [205.233.59.134]) by demeter2.kernel.org (8.14.4/8.14.4) with ESMTP id p88CmaIq014158 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-SHA bits=256 verify=NO) for ; Thu, 8 Sep 2011 12:48:57 GMT Received: from canuck.infradead.org ([134.117.69.58]) by merlin.infradead.org with esmtps (Exim 4.76 #1 (Red Hat Linux)) id 1R1e1i-000459-DQ; Thu, 08 Sep 2011 12:48:18 +0000 Received: from localhost ([127.0.0.1] helo=canuck.infradead.org) by canuck.infradead.org with esmtp (Exim 4.76 #1 (Red Hat Linux)) id 1R1e1i-0004ll-0Z; Thu, 08 Sep 2011 12:48:18 +0000 Received: from arroyo.ext.ti.com ([192.94.94.40]) by canuck.infradead.org with esmtps (Exim 4.76 #1 (Red Hat Linux)) id 1R1e1e-0004lD-KH for linux-arm-kernel@lists.infradead.org; Thu, 08 Sep 2011 12:48:15 +0000 Received: from dbdp20.itg.ti.com ([172.24.170.38]) by arroyo.ext.ti.com (8.13.7/8.13.7) with ESMTP id p88Cm45D010598 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-SHA bits=256 verify=NO); Thu, 8 Sep 2011 07:48:07 -0500 Received: from dbde70.ent.ti.com (localhost [127.0.0.1]) by dbdp20.itg.ti.com (8.13.8/8.13.8) with ESMTP id p88Cm4uL024688; Thu, 8 Sep 2011 18:18:04 +0530 (IST) Received: from dbdp31.itg.ti.com (172.24.170.98) by DBDE70.ent.ti.com (172.24.170.148) with Microsoft SMTP Server id 8.3.106.1; Thu, 8 Sep 2011 18:18:04 +0530 Received: from psplinux051.india.ti.com (psplinux051.india.ti.com [172.24.162.244]) by dbdp31.itg.ti.com (8.13.8/8.13.8) with ESMTP id p88Cm4bs024430; Thu, 8 Sep 2011 18:18:04 +0530 (IST) Received: from psplinux051.india.ti.com (localhost [127.0.0.1]) by psplinux051.india.ti.com (8.13.1/8.13.1) with ESMTP id p88Cm4cG000827; Thu, 8 Sep 2011 18:18:04 +0530 Received: (from x0151633@localhost) by psplinux051.india.ti.com (8.13.1/8.13.1/Submit) id p88Cm4n2000824; Thu, 8 Sep 2011 18:18:04 +0530 From: Abhilash K V To: , , Subject: [PATCH v2 2/3] OMAP3: Add support for TPS65023 (AM35x only) Date: Thu, 8 Sep 2011 18:18:04 +0530 Message-ID: <1315486084-795-1-git-send-email-abhilash.kv@ti.com> X-Mailer: git-send-email 1.6.2.4 MIME-Version: 1.0 X-CRM114-Version: 20090807-BlameThorstenAndJenny ( TRE 0.7.6 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20110908_084814_832343_8B58ABF8 X-CRM114-Status: GOOD ( 21.45 ) X-Spam-Score: -2.8 (--) X-Spam-Report: SpamAssassin version 3.3.1 on canuck.infradead.org summary: Content analysis details: (-2.8 points) pts rule name description ---- ---------------------- -------------------------------------------------- -2.3 RCVD_IN_DNSWL_MED RBL: Sender listed at http://www.dnswl.org/, medium trust [192.94.94.40 listed in list.dnswl.org] -0.5 RP_MATCHES_RCVD Envelope sender domain matches handover relay domain Cc: khilman@ti.com, linux@arm.linux.org.uk, sameo@linux.intel.com, tony@atomide.com, santosh.shilimkar@ti.com, Abhilash K V , premi@ti.com, david.woodhouse@intel.com X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.12 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: linux-arm-kernel-bounces@lists.infradead.org Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Greylist: IP, sender and recipient auto-whitelisted, not delayed by milter-greylist-4.2.6 (demeter2.kernel.org [140.211.167.43]); Thu, 08 Sep 2011 12:48:57 +0000 (UTC) From: Sanjeev Premi This patch adds support for TPS65023 used with OMAP3 devices. The PMIC is currently hooked to AM35x devices, but can easily be extended for other OMAP3 devices. Signed-off-by: Sanjeev Premi Signed-off-by: Abhilash K V --- arch/arm/mach-omap2/Makefile | 3 +- arch/arm/mach-omap2/pm.c | 1 + arch/arm/mach-omap2/pm.h | 9 ++++ arch/arm/mach-omap2/pmic_tps65023.c | 84 +++++++++++++++++++++++++++++++++++ 4 files changed, 96 insertions(+), 1 deletions(-) create mode 100644 arch/arm/mach-omap2/pmic_tps65023.c diff --git a/arch/arm/mach-omap2/Makefile b/arch/arm/mach-omap2/Makefile index e43d94b..590e797 100644 --- a/arch/arm/mach-omap2/Makefile +++ b/arch/arm/mach-omap2/Makefile @@ -18,7 +18,8 @@ obj-$(CONFIG_ARCH_OMAP4) += prm44xx.o $(hwmod-common) obj-$(CONFIG_OMAP_MCBSP) += mcbsp.o -obj-$(CONFIG_TWL4030_CORE) += omap_twl.o +obj-$(CONFIG_TWL4030_CORE) += omap_twl.o +obj-$(CONFIG_REGULATOR_TPS65023) += pmic_tps65023.o # SMP support ONLY available for OMAP4 obj-$(CONFIG_SMP) += omap-smp.o omap-headsmp.o diff --git a/arch/arm/mach-omap2/pm.c b/arch/arm/mach-omap2/pm.c index 863b384..f8338a8 100644 --- a/arch/arm/mach-omap2/pm.c +++ b/arch/arm/mach-omap2/pm.c @@ -258,6 +258,7 @@ static int __init omap2_common_pm_late_init(void) if (omap3_has_sr()) omap3_twl_init(); omap4_twl_init(); + omap3_tps65023_init(); /* Init the voltage layer */ omap_voltage_late_init(); diff --git a/arch/arm/mach-omap2/pm.h b/arch/arm/mach-omap2/pm.h index 4e166ad..ce028f6 100644 --- a/arch/arm/mach-omap2/pm.h +++ b/arch/arm/mach-omap2/pm.h @@ -133,5 +133,14 @@ static inline int omap4_twl_init(void) return -EINVAL; } #endif +#ifdef CONFIG_REGULATOR_TPS65023 +extern int omap3_tps65023_init(void); +#else +static inline int omap3_tps65023_init(void) +{ + return -EINVAL; +} +#endif + #endif diff --git a/arch/arm/mach-omap2/pmic_tps65023.c b/arch/arm/mach-omap2/pmic_tps65023.c new file mode 100644 index 0000000..3245929 --- /dev/null +++ b/arch/arm/mach-omap2/pmic_tps65023.c @@ -0,0 +1,84 @@ +/** + * Implements support for TPS65023 + * + * Copyright (C) 2011 Texas Instruments Incorporated - http://www.ti.com/ + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation version 2. + * + * This program is distributed "as is" WITHOUT ANY WARRANTY of any + * kind, whether express or implied; without even the implied warranty + * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#include +#include +#include +#include + +#include "voltage.h" + +#include "pm.h" + +#define TPS65023_VDCDC1_MIN 800000 /* 0.8V */ +#define TPS65023_VDCDC1_STEP 25000 /* 0.025V */ + + +/* + * Get voltage corresponding to specified vsel value using this formula: + * Vout = 0.8V + (25mV x Vsel) + */ +static unsigned long tps65023_vsel_to_uv(const u8 vsel) +{ + return TPS65023_VDCDC1_MIN + (TPS65023_VDCDC1_STEP * vsel); +} + +/* + * Get vsel value corresponding to specified voltage using this formula: + * Vsel = (Vout - 0.8V)/ 25mV + */ +static u8 tps65023_uv_to_vsel(unsigned long uv) +{ + return DIV_ROUND_UP(uv - TPS65023_VDCDC1_MIN, TPS65023_VDCDC1_STEP); +} + +/* + * TPS65023 is currently supported only for AM35x devices. + * Therefore, implementation below is specific to this device pair. + */ + +/** + * Voltage information related to the MPU voltage domain of the + * AM35x processors - in relation to the TPS65023. + */ +static struct omap_volt_pmic_info tps65023_am35xx_mpu_volt_info = { + .step_size = 25000, + .on_volt = 1200000, + .vsel_to_uv = tps65023_vsel_to_uv, + .uv_to_vsel = tps65023_uv_to_vsel, +}; + +int __init omap3_tps65023_init(void) +{ + struct voltagedomain *voltdm; + + if (!cpu_is_omap34xx()) + return -ENODEV; + + if (cpu_is_omap3505() || cpu_is_omap3517()) { + voltdm = omap_voltage_domain_lookup("mpu"); + omap_voltage_register_pmic(voltdm, + &tps65023_am35xx_mpu_volt_info); + voltdm = omap_voltage_domain_lookup("core"); + omap_voltage_register_pmic(voltdm, + &tps65023_am35xx_mpu_volt_info); + } else { + /* TODO: + * Support for other devices that support TPS65023 + */ + } + + return 0; +}