From patchwork Wed Jul 4 14:56:46 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Thomas Petazzoni X-Patchwork-Id: 1156621 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-process-083081@patchwork2.kernel.org Received: from merlin.infradead.org (merlin.infradead.org [205.233.59.134]) by patchwork2.kernel.org (Postfix) with ESMTP id C35FCDFF0F for ; Wed, 4 Jul 2012 15:19:39 +0000 (UTC) Received: from localhost ([::1] helo=merlin.infradead.org) by merlin.infradead.org with esmtp (Exim 4.76 #1 (Red Hat Linux)) id 1SmRH6-00011e-IH; Wed, 04 Jul 2012 15:13:54 +0000 Received: from mail.free-electrons.com ([88.190.12.23]) by merlin.infradead.org with esmtp (Exim 4.76 #1 (Red Hat Linux)) id 1SmR13-0006KY-DY for linux-arm-kernel@lists.infradead.org; Wed, 04 Jul 2012 14:58:11 +0000 Received: by mail.free-electrons.com (Postfix, from userid 106) id 81CA9239; Wed, 4 Jul 2012 16:57:17 +0200 (CEST) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.free-electrons.com X-Spam-Level: X-Spam-Status: No, score=-2.8 required=5.0 tests=ALL_TRUSTED,AWL,BAYES_00 shortcircuit=no autolearn=ham version=3.3.1 Received: from localhost (col31-4-88-188-83-94.fbx.proxad.net [88.188.83.94]) by mail.free-electrons.com (Postfix) with ESMTPSA id 54859192; Wed, 4 Jul 2012 16:57:03 +0200 (CEST) From: Thomas Petazzoni To: Arnd Bergmann , Olof Johansson Subject: [PATCH v8 9/9] ARM: mvebu: MPIC: read number of interrupts from control register Date: Wed, 4 Jul 2012 16:56:46 +0200 Message-Id: <1341413806-26376-10-git-send-email-thomas.petazzoni@free-electrons.com> X-Mailer: git-send-email 1.7.9.5 In-Reply-To: <1341413806-26376-1-git-send-email-thomas.petazzoni@free-electrons.com> References: <1341413806-26376-1-git-send-email-thomas.petazzoni@free-electrons.com> X-Spam-Note: CRM114 invocation failed X-Spam-Score: -1.9 (-) X-Spam-Report: SpamAssassin version 3.3.2 on merlin.infradead.org summary: Content analysis details: (-1.9 points) pts rule name description ---- ---------------------- -------------------------------------------------- -0.0 T_RP_MATCHES_RCVD Envelope sender domain matches handover relay domain -1.9 BAYES_00 BODY: Bayes spam probability is 0 to 1% [score: 0.0000] Cc: Lior Amsalem , Andrew Lunn , Yehuda Yitschak , Jason Cooper , Tawfik Bayouk , Nicolas Pitre , Jon Masters , David Marlin , Eran Ben-Avi , Nadav Haklai , Maen Suleiman , Ben Dooks , Shadi Ammouri , Ben Dooks , Gregory Clement , Eric Miao , Thomas Petazzoni , linux-arm-kernel@lists.infradead.org X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: linux-arm-kernel-bounces@lists.infradead.org Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org From: Ben Dooks Read the number of MPIC interrupts from the controller and only register that many. [gregory.clement@free-electrons.com: rename armada symbol name to fit with new name: armada_370_xp] Signed-off-by: Ben Dooks Signed-off-by: Gregory CLEMENT Signed-off-by: Thomas Petazzoni Signed-off-by: Lior Amsalem --- arch/arm/mach-mvebu/irq-armada-370-xp.c | 9 ++++++--- 1 file changed, 6 insertions(+), 3 deletions(-) diff --git a/arch/arm/mach-mvebu/irq-armada-370-xp.c b/arch/arm/mach-mvebu/irq-armada-370-xp.c index 645a8d3..5f5f939 100644 --- a/arch/arm/mach-mvebu/irq-armada-370-xp.c +++ b/arch/arm/mach-mvebu/irq-armada-370-xp.c @@ -29,13 +29,12 @@ #define ARMADA_370_XP_INT_SET_MASK_OFFS (0x48) #define ARMADA_370_XP_INT_CLEAR_MASK_OFFS (0x4C) +#define ARMADA_370_XP_INT_CONTROL (0x00) #define ARMADA_370_XP_INT_SET_ENABLE_OFFS (0x30) #define ARMADA_370_XP_INT_CLEAR_ENABLE_OFFS (0x34) #define ARMADA_370_XP_CPU_INTACK_OFFS (0x44) -#define ARMADA_370_XP_NR_IRQS (115) - static void __iomem *per_cpu_int_base; static void __iomem *main_int_base; static struct irq_domain *armada_370_xp_mpic_domain; @@ -81,14 +80,18 @@ static struct irq_domain_ops armada_370_xp_mpic_irq_ops = { static int __init armada_370_xp_mpic_of_init(struct device_node *node, struct device_node *parent) { + u32 control; + main_int_base = of_iomap(node, 0); per_cpu_int_base = of_iomap(node, 1); BUG_ON(!main_int_base); BUG_ON(!per_cpu_int_base); + control = readl(main_int_base + ARMADA_370_XP_INT_CONTROL); + armada_370_xp_mpic_domain = - irq_domain_add_linear(node, ARMADA_370_XP_NR_IRQS, + irq_domain_add_linear(node, (control >> 2) & 0x3ff, &armada_370_xp_mpic_irq_ops, NULL); if (!armada_370_xp_mpic_domain)