From patchwork Sun Jul 15 14:49:09 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Florian Fainelli X-Patchwork-Id: 1199011 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-process-083081@patchwork1.kernel.org Received: from merlin.infradead.org (merlin.infradead.org [205.233.59.134]) by patchwork1.kernel.org (Postfix) with ESMTP id 8796C3FD4F for ; Sun, 15 Jul 2012 14:57:31 +0000 (UTC) Received: from localhost ([::1] helo=merlin.infradead.org) by merlin.infradead.org with esmtp (Exim 4.76 #1 (Red Hat Linux)) id 1SqQDY-0003Pi-De; Sun, 15 Jul 2012 14:54:40 +0000 Received: from mail-we0-f177.google.com ([74.125.82.177]) by merlin.infradead.org with esmtps (Exim 4.76 #1 (Red Hat Linux)) id 1SqQ9j-0003E3-Gl for linux-arm-kernel@lists.infradead.org; Sun, 15 Jul 2012 14:50:58 +0000 Received: by weyr3 with SMTP id r3so3657469wey.36 for ; Sun, 15 Jul 2012 07:49:33 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=sender:from:to:cc:subject:date:message-id:x-mailer:in-reply-to :references; bh=Cr4pitkDcBNkVJ1jycosJBHKn/HapNuJ1ru2wzSMUdU=; b=uRzO1tvxLykJK5ik9pxhegUJ0gFhZsXGRrHQ/Cx98AlhDKQxv6ZRCeciM1UtvMEMyq v/GlWcRabVwEAAR/+Ol3PHuyWjZAzwWykpWIvJs1vRTPxqS6/nqEmD1SaDl4qI20ykjU YIAX9LFpOZN2QqzTAeSBIKkWUygoQnpiIUu28LojtwiFFMaROhbGmY0Nbe1DQjS4dTyx w9d46Mt9lYeFWNec3LT0dfcPmN2pfvP8pDnc4YgxY81R6oUi9X46qXBpmcxDwqwEPbL6 Cijt3nGowgj19l+RCy4/0aX4ENY78B22rM2idUDgR6JTbdOHgZFNtmD0k0jxE5iUdA+K yT7g== Received: by 10.180.83.106 with SMTP id p10mr11426228wiy.21.1342363773170; Sun, 15 Jul 2012 07:49:33 -0700 (PDT) Received: from localhost.localdomain ([78.251.81.37]) by mx.google.com with ESMTPS id t7sm23788594wix.6.2012.07.15.07.49.31 (version=TLSv1/SSLv3 cipher=OTHER); Sun, 15 Jul 2012 07:49:32 -0700 (PDT) From: Florian Fainelli To: linux-arm-kernel@lists.infradead.org Subject: [PATCH 3/8] ARM: MCS814x: add Device Tree bindings documentation Date: Sun, 15 Jul 2012 16:49:09 +0200 Message-Id: <1342363754-30808-4-git-send-email-florian@openwrt.org> X-Mailer: git-send-email 1.7.10.4 In-Reply-To: <1342363754-30808-1-git-send-email-florian@openwrt.org> References: <1342363754-30808-1-git-send-email-florian@openwrt.org> X-Spam-Note: CRM114 invocation failed X-Spam-Score: -2.6 (--) X-Spam-Report: SpamAssassin version 3.3.2 on merlin.infradead.org summary: Content analysis details: (-2.6 points) pts rule name description ---- ---------------------- -------------------------------------------------- 0.0 FREEMAIL_FROM Sender email is commonly abused enduser mail provider (f.fainelli[at]gmail.com) -0.7 RCVD_IN_DNSWL_LOW RBL: Sender listed at http://www.dnswl.org/, low trust [74.125.82.177 listed in list.dnswl.org] -0.0 SPF_PASS SPF: sender matches SPF record -1.9 BAYES_00 BODY: Bayes spam probability is 0 to 1% [score: 0.0000] 0.1 DKIM_SIGNED Message has a DKIM or DK signature, not necessarily valid -0.1 DKIM_VALID Message has at least one valid DKIM or DK signature Cc: olof@lixom.net, devicetree-discuss@lists.ozlabs.org, Florian Fainelli , arnd@arndb.de X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: linux-arm-kernel-bounces@lists.infradead.org Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org This patch adds the device tree bindings documentation for the basic Moschip MCS814x bindings that we support: - soc - interrupt controller - timer - pci controller Signed-off-by: Florian Fainelli --- .../devicetree/bindings/arm/mcs814x/mcs814x-intc.txt | 18 ++++++++++++++++++ .../devicetree/bindings/arm/mcs814x/mcs814x-pci.txt | 16 ++++++++++++++++ .../bindings/arm/mcs814x/mcs814x-timer.txt | 16 ++++++++++++++++ .../devicetree/bindings/arm/mcs814x/mcs814x.txt | 13 +++++++++++++ .../devicetree/bindings/vendor-prefixes.txt | 1 + 5 files changed, 64 insertions(+) create mode 100644 Documentation/devicetree/bindings/arm/mcs814x/mcs814x-intc.txt create mode 100644 Documentation/devicetree/bindings/arm/mcs814x/mcs814x-pci.txt create mode 100644 Documentation/devicetree/bindings/arm/mcs814x/mcs814x-timer.txt create mode 100644 Documentation/devicetree/bindings/arm/mcs814x/mcs814x.txt diff --git a/Documentation/devicetree/bindings/arm/mcs814x/mcs814x-intc.txt b/Documentation/devicetree/bindings/arm/mcs814x/mcs814x-intc.txt new file mode 100644 index 0000000..2bf0c47 --- /dev/null +++ b/Documentation/devicetree/bindings/arm/mcs814x/mcs814x-intc.txt @@ -0,0 +1,18 @@ +Moschip MCS814x interrupt controller bindings +---------------------------------------------- + +Required properties: +- compatible: should be "moschip,mcs814x-intc" +- interrupt-controller: identifies the node as an interrupt controller +- #interrupt-cells: the number of cells to define the interrupts. Should be 1. +The cells are the IRQ number +- reg: contains the base address register and length, there should be only 1 + cell + +Example: + intc: interrupt-controller@400e4000 { + compatible = "moschip,mcs814x-intc"; + interrupt-controller; + #interrupt-cells = <1>; + reg = <0x400e4000 0x48>; + }; diff --git a/Documentation/devicetree/bindings/arm/mcs814x/mcs814x-pci.txt b/Documentation/devicetree/bindings/arm/mcs814x/mcs814x-pci.txt new file mode 100644 index 0000000..de59b04 --- /dev/null +++ b/Documentation/devicetree/bindings/arm/mcs814x/mcs814x-pci.txt @@ -0,0 +1,16 @@ +Moschip MCS814x PCI controller bindings +--------------------------------------- + +Required properties: +- compatible: should be "moschip,mcs814x-pci" +- reg: should contain the base register address and length of the PCI controller + configuration register as well as the base register address and length of the + PCI eeprom emulator +- interrupts: should contain the interrupt line of the abort interrupt +- #address-cells: should be 3 +- #size-cells: should be 2 +- ranges: should contain the properly encoded PCI ranges of the IO, non-prefetchable + and prefetchable memory regions +- #interrupt-cells: should be 1 +- interrupt-map-mask: should be 0 +- interrupt-map: should be the properly encoded PCI slot/pin to interrupt line diff --git a/Documentation/devicetree/bindings/arm/mcs814x/mcs814x-timer.txt b/Documentation/devicetree/bindings/arm/mcs814x/mcs814x-timer.txt new file mode 100644 index 0000000..0bf22d1 --- /dev/null +++ b/Documentation/devicetree/bindings/arm/mcs814x/mcs814x-timer.txt @@ -0,0 +1,16 @@ +MMoschip MCS814x timer bindings +------------------------------- + +Required properties: +- compatible: should be "moschip,mcs814x-timer" +- interrupts: should be the physical interrupt number +- reg: contains the base address register and length, there should be only 1 + cell + +Example: + timer: timer@400f800c { + compatible = "moschip,mcs814x-timer"; + interrupts = <0>; + reg = <0x400f800c 0x8>; + }; + diff --git a/Documentation/devicetree/bindings/arm/mcs814x/mcs814x.txt b/Documentation/devicetree/bindings/arm/mcs814x/mcs814x.txt new file mode 100644 index 0000000..503c234 --- /dev/null +++ b/Documentation/devicetree/bindings/arm/mcs814x/mcs814x.txt @@ -0,0 +1,13 @@ +MMoschip MCS814x SoC bindings + +----------------------------- + +Boards including a Moschip MCS814x SoC should include the following properties + +Required root node property: +- compatible: must contain "moschip,mcs814x" + +Boards including a Moschip MCS8140 should also include the following property. + +Required root node property: +- compatible: must contain "moschip,mcs8140" diff --git a/Documentation/devicetree/bindings/vendor-prefixes.txt b/Documentation/devicetree/bindings/vendor-prefixes.txt index 6eab917..943e4f3 100644 --- a/Documentation/devicetree/bindings/vendor-prefixes.txt +++ b/Documentation/devicetree/bindings/vendor-prefixes.txt @@ -28,6 +28,7 @@ linux Linux-specific binding marvell Marvell Technology Group Ltd. maxim Maxim Integrated Products mosaixtech Mosaix Technologies, Inc. +moschp Moschip Semiconductors national National Semiconductor nintendo Nintendo nvidia NVIDIA