From patchwork Mon Jul 16 03:53:56 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Rob Herring X-Patchwork-Id: 1199811 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-process-083081@patchwork1.kernel.org Received: from merlin.infradead.org (merlin.infradead.org [205.233.59.134]) by patchwork1.kernel.org (Postfix) with ESMTP id 421103FD48 for ; Mon, 16 Jul 2012 04:00:09 +0000 (UTC) Received: from localhost ([::1] helo=merlin.infradead.org) by merlin.infradead.org with esmtp (Exim 4.76 #1 (Red Hat Linux)) id 1SqcQr-0001gU-HT; Mon, 16 Jul 2012 03:57:15 +0000 Received: from mail-ob0-f177.google.com ([209.85.214.177]) by merlin.infradead.org with esmtps (Exim 4.76 #1 (Red Hat Linux)) id 1SqcOG-0001TZ-Uo for linux-arm-kernel@lists.infradead.org; Mon, 16 Jul 2012 03:54:35 +0000 Received: by mail-ob0-f177.google.com with SMTP id ta17so9221228obb.36 for ; Sun, 15 Jul 2012 20:54:32 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=from:to:cc:subject:date:message-id:x-mailer:in-reply-to:references; bh=p0gEGI7VK6wn4TalUDy965ulC0k1f/+x+xt9J8GgMB4=; b=Qvx+X3a9/p8qfOtbaCMAqLZcnpFRkIWtfTPH97zSpC2TnE/wp4Q2kuLUNSL4MdNrV4 IxRQ7mnDJQf6R3rUD+rYjIjpzTCuYm1rkWVXAmbEBuCidPpaeJ7g1WjafbITS28Ynemk qowt0tEsJMemLyY1VsayBHtQhxnPLTSJ11LYvWtDPT0mNEAFMeJO6Vozj/4ePRtR8AkD DmF/zKpjb6acXgv5IunjFKEXe93omde2Ca+ksVqFlTMbMxF2TbZRZUmNxCzUWKbJPysS KUy5wH5e8Q9a9VY+MYXC5BwTjVVCkdvcDV3J2yZncck2fojTWgsdvAljZ/MBBsMUsSOY TT2w== Received: by 10.182.160.10 with SMTP id xg10mr13081036obb.76.1342410872729; Sun, 15 Jul 2012 20:54:32 -0700 (PDT) Received: from rob-laptop.grandecom.net (65-36-72-55.dyn.grandenetworks.net. [65.36.72.55]) by mx.google.com with ESMTPS id a9sm7393862obp.14.2012.07.15.20.54.30 (version=SSLv3 cipher=OTHER); Sun, 15 Jul 2012 20:54:31 -0700 (PDT) From: Rob Herring To: linux-arm-kernel@lists.infradead.org Subject: [PATCH 3/3] ARM: convert asm/irqflags.h to use asm-generic/irqflags.h Date: Sun, 15 Jul 2012 22:53:56 -0500 Message-Id: <1342410836-6010-4-git-send-email-robherring2@gmail.com> X-Mailer: git-send-email 1.7.9.5 In-Reply-To: <1342410836-6010-1-git-send-email-robherring2@gmail.com> References: <1342410836-6010-1-git-send-email-robherring2@gmail.com> X-Spam-Note: CRM114 invocation failed X-Spam-Score: -2.5 (--) X-Spam-Report: SpamAssassin version 3.3.2 on merlin.infradead.org summary: Content analysis details: (-2.5 points) pts rule name description ---- ---------------------- -------------------------------------------------- -0.7 RCVD_IN_DNSWL_LOW RBL: Sender listed at http://www.dnswl.org/, low trust [209.85.214.177 listed in list.dnswl.org] 0.0 FREEMAIL_FROM Sender email is commonly abused enduser mail provider (robherring2[at]gmail.com) -0.0 SPF_PASS SPF: sender matches SPF record 0.2 FREEMAIL_ENVFROM_END_DIGIT Envelope-from freemail username ends in digit (robherring2[at]gmail.com) -1.9 BAYES_00 BODY: Bayes spam probability is 0 to 1% [score: 0.0000] -0.1 DKIM_VALID_AU Message has a valid DKIM or DK signature from author's domain 0.1 DKIM_SIGNED Message has a DKIM or DK signature, not necessarily valid -0.1 DKIM_VALID Message has at least one valid DKIM or DK signature Cc: Russell King , Rob Herring , Arnd Bergmann , Nicolas Pitre X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: linux-arm-kernel-bounces@lists.infradead.org Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org From: Rob Herring By implmenting arch_local_irq_restore with constant flags, we can use asm-generic/irqflags.h and remove some of the ARM version of irqflags.h. Verified the code is equivalent by checking the disassembled code. Signed-off-by: Rob Herring --- arch/arm/include/asm/irqflags.h | 131 ++++++++++++++------------------------- 1 file changed, 45 insertions(+), 86 deletions(-) diff --git a/arch/arm/include/asm/irqflags.h b/arch/arm/include/asm/irqflags.h index 1e6cca5..67bfb53 100644 --- a/arch/arm/include/asm/irqflags.h +++ b/arch/arm/include/asm/irqflags.h @@ -8,88 +8,68 @@ /* * CPU interrupt mask handling. */ -#if __LINUX_ARM_ARCH__ >= 6 +#define ARCH_IRQ_DISABLED PSR_I_BIT +#define ARCH_IRQ_ENABLED 0 -static inline unsigned long arch_local_irq_save(void) +static inline unsigned long arch_local_save_flags(void) { unsigned long flags; asm volatile( - " mrs %0, cpsr @ arch_local_irq_save\n" - " cpsid i" + " mrs %0, cpsr @ arch_local_save_flags\n" : "=r" (flags) : : "memory", "cc"); return flags; } -static inline void arch_local_irq_enable(void) +static inline void constant_arch_local_irq_restore(unsigned long flags) { - asm volatile( - " cpsie i @ arch_local_irq_enable" - : - : - : "memory", "cc"); +#if __LINUX_ARM_ARCH__ >= 6 + if (flags == ARCH_IRQ_ENABLED) + asm volatile( + " cpsie i @ constant_arch_local_irq_restore" + : : : "memory", "cc"); + else if (flags == ARCH_IRQ_DISABLED) + asm volatile( + " cpsid i @ constant_arch_local_irq_restore" + : : : "memory", "cc"); +#else + unsigned long temp; + if (flags == ARCH_IRQ_ENABLED) + asm volatile( + " mrs %0, cpsr @ constant_arch_local_irq_restore\n" + " bic %0, %0, #128\n" + " msr cpsr_c, %0" + : "=r" (temp) + : + : "memory", "cc"); + else if (flags == ARCH_IRQ_DISABLED) + asm volatile( + " mrs %0, cpsr @ constant_arch_local_irq_restore\n" + " orr %0, %0, #128\n" + " msr cpsr_c, %0" + : "=r" (temp) + : + : "memory", "cc"); +#endif } -static inline void arch_local_irq_disable(void) +static inline void _arch_local_irq_restore(unsigned long flags) { - asm volatile( - " cpsid i @ arch_local_irq_disable" - : + asm volatile( + " msr cpsr_c, %0 @ _arch_local_irq_restore" : + : "r" (flags) : "memory", "cc"); } +#define arch_local_irq_restore(flags) \ + (__builtin_constant_p(flags) ? constant_arch_local_irq_restore(flags) : \ + _arch_local_irq_restore(flags)) + +#if __LINUX_ARM_ARCH__ >= 6 #define local_fiq_enable() __asm__("cpsie f @ __stf" : : : "memory", "cc") #define local_fiq_disable() __asm__("cpsid f @ __clf" : : : "memory", "cc") #else - -/* - * Save the current interrupt enable state & disable IRQs - */ -static inline unsigned long arch_local_irq_save(void) -{ - unsigned long flags, temp; - - asm volatile( - " mrs %0, cpsr @ arch_local_irq_save\n" - " orr %1, %0, #128\n" - " msr cpsr_c, %1" - : "=r" (flags), "=r" (temp) - : - : "memory", "cc"); - return flags; -} - -/* - * Enable IRQs - */ -static inline void arch_local_irq_enable(void) -{ - unsigned long temp; - asm volatile( - " mrs %0, cpsr @ arch_local_irq_enable\n" - " bic %0, %0, #128\n" - " msr cpsr_c, %0" - : "=r" (temp) - : - : "memory", "cc"); -} - -/* - * Disable IRQs - */ -static inline void arch_local_irq_disable(void) -{ - unsigned long temp; - asm volatile( - " mrs %0, cpsr @ arch_local_irq_disable\n" - " orr %0, %0, #128\n" - " msr cpsr_c, %0" - : "=r" (temp) - : - : "memory", "cc"); -} - /* * Enable FIQs */ @@ -122,34 +102,13 @@ static inline void arch_local_irq_disable(void) #endif -/* - * Save the current interrupt enable state. - */ -static inline unsigned long arch_local_save_flags(void) -{ - unsigned long flags; - asm volatile( - " mrs %0, cpsr @ local_save_flags" - : "=r" (flags) : : "memory", "cc"); - return flags; -} - -/* - * restore saved IRQ & FIQ state - */ -static inline void arch_local_irq_restore(unsigned long flags) -{ - asm volatile( - " msr cpsr_c, %0 @ local_irq_restore" - : - : "r" (flags) - : "memory", "cc"); -} - static inline int arch_irqs_disabled_flags(unsigned long flags) { return flags & PSR_I_BIT; } +#define arch_irqs_disabled_flags arch_irqs_disabled_flags + +#include #endif #endif