From patchwork Wed Jul 18 13:45:26 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Vivek Gautam X-Patchwork-Id: 1211081 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-process-083081@patchwork1.kernel.org Received: from merlin.infradead.org (merlin.infradead.org [205.233.59.134]) by patchwork1.kernel.org (Postfix) with ESMTP id 3458B3FCFC for ; Wed, 18 Jul 2012 13:48:35 +0000 (UTC) Received: from localhost ([::1] helo=merlin.infradead.org) by merlin.infradead.org with esmtp (Exim 4.76 #1 (Red Hat Linux)) id 1SrUWX-0001Kk-9X; Wed, 18 Jul 2012 13:42:41 +0000 Received: from mailout1.samsung.com ([203.254.224.24]) by merlin.infradead.org with esmtp (Exim 4.76 #1 (Red Hat Linux)) id 1SrULz-0008PC-8I for linux-arm-kernel@lists.infradead.org; Wed, 18 Jul 2012 13:31:53 +0000 Received: from epcpsbgm2.samsung.com (mailout1.samsung.com [203.254.224.24]) by mailout1.samsung.com (Oracle Communications Messaging Server 7u4-24.01(7.0.4.24.0) 64bit (built Nov 17 2011)) with ESMTP id <0M7C00LWOYVBJBE0@mailout1.samsung.com> for linux-arm-kernel@lists.infradead.org; Wed, 18 Jul 2012 22:31:12 +0900 (KST) X-AuditID: cbfee61b-b7f566d000005c8a-77-5006ba9fd37d Received: from epmmp2 ( [203.254.227.17]) by epcpsbgm2.samsung.com (EPCPMTA) with SMTP id A9.4D.23690.F9AB6005; Wed, 18 Jul 2012 22:31:12 +0900 (KST) Received: from localhost.localdomain ([107.108.73.106]) by mmp2.samsung.com (Oracle Communications Messaging Server 7u4-24.01 (7.0.4.24.0) 64bit (built Nov 17 2011)) with ESMTPA id <0M7C00MXCYV9WD70@mmp2.samsung.com> for linux-arm-kernel@lists.infradead.org; Wed, 18 Jul 2012 22:31:11 +0900 (KST) From: Vivek Gautam To: kgene.kim@samsung.com, l.majewski@samsung.com, kyungmin.park@samsung.com, thomas.abraham@linaro.org, linux-samsung-soc@vger.kernel.org, linux-arm-kernel@lists.infradead.org, devicetree-discuss@lists.ozlabs.org, m.szyprowski@samsung.com Subject: [PATCH 6/8] ARM: EXYNOS5: Add machine data for USB3.0 Date: Wed, 18 Jul 2012 19:15:26 +0530 Message-id: <1342619128-25013-7-git-send-email-gautam.vivek@samsung.com> X-Mailer: git-send-email 1.7.0.4 In-reply-to: <1342619128-25013-1-git-send-email-gautam.vivek@samsung.com> References: <1342619128-25013-1-git-send-email-gautam.vivek@samsung.com> X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFnrMJMWRmVeSWpSXmKPExsVy+t9jQd0Fu9gCDDYJW2x6fI3VgdFj85L6 AMYoLpuU1JzMstQifbsErozjs78yF/xQrLi7ZT5jA+Mb6S5GTg4JAROJD1N3s0DYYhIX7q1n 62Lk4hASmM4ocelVDzOEs4FJYvmG/WBVbAK6Ek1vdzGCJEQEvjJKnPy6DqyKWWApo8TWna1s IFXCAnYSU/t2MoPYLAKqEqsv/mcHsXkFPCQ+H9kEtU9BonXZIbA4p4CnxNUZG8HqhYBqXs+Y yjyBkXcBI8MqRtHUguSC4qT0XCO94sTc4tK8dL3k/NxNjGCvP5PewbiqweIQowAHoxIPbwQw GIRYE8uKK3MPMUpwMCuJ8PpvAwrxpiRWVqUW5ccXleakFh9ilOZgURLnNfH+6i8kkJ5Ykpqd mlqQWgSTZeLglGpgXKBbJcESUWyW+qb00oLyY0fkT8/6f6ZtBqv0TEWZBz9X/7NmP8xgGrfV TmzBz1cLv+7NWn/l+015Id7XFiFHFqsu3/BGO+vOgct/WU7avvvd9PvCgQqu/w2dxl1NS1YZ rBc/99eHQcltr6FGq1K95e25Nz6ofsp23GxqyjvP8XtL4vntc0syOpRYijMSDbWYi4oTAUF7 C3P2AQAA X-TM-AS-MML: No X-Spam-Note: CRM114 invocation failed X-Spam-Score: -6.9 (------) X-Spam-Report: SpamAssassin version 3.3.2 on merlin.infradead.org summary: Content analysis details: (-6.9 points) pts rule name description ---- ---------------------- -------------------------------------------------- -5.0 RCVD_IN_DNSWL_HI RBL: Sender listed at http://www.dnswl.org/, high trust [203.254.224.24 listed in list.dnswl.org] -0.0 SPF_HELO_PASS SPF: HELO matches SPF record -0.0 T_RP_MATCHES_RCVD Envelope sender domain matches handover relay domain -1.9 BAYES_00 BODY: Bayes spam probability is 0 to 1% [score: 0.0000] Cc: yulgon.kim@samsung.com, av.tikhomirov@samsung.com, prashanth.g@samsung.com, boyko.lee@samsung.com, joshi@samsung.com, a.kesavan@samsung.com, olofj@google.com X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: linux-arm-kernel-bounces@lists.infradead.org Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org This patch adds clock definitions and address mapping of PHY for USB3.0 in exynos5 Signed-off-by: Abhilash Kesavan Signed-off-by: Vivek Gautam diff --git a/arch/arm/mach-exynos/clock-exynos5.c b/arch/arm/mach-exynos/clock-exynos5.c index 774533c..af1b917 100644 --- a/arch/arm/mach-exynos/clock-exynos5.c +++ b/arch/arm/mach-exynos/clock-exynos5.c @@ -668,6 +668,11 @@ static struct clk exynos5_init_clocks_off[] = { .enable = exynos5_clk_ip_fsys_ctrl , .ctrlbit = (1 << 18), }, { + .name = "usbdrd30", + .parent = &exynos5_clk_aclk_200.clk, + .enable = exynos5_clk_ip_fsys_ctrl, + .ctrlbit = (1 << 19), + }, { .name = "usbotg", .enable = exynos5_clk_ip_fsys_ctrl, .ctrlbit = (1 << 7), @@ -909,6 +914,16 @@ struct clksrc_sources exynos5_clkset_group = { .nr_sources = ARRAY_SIZE(exynos5_clkset_group_list), }; +struct clk *exynos5_clkset_usbdrd30_list[] = { + [0] = &exynos5_clk_mout_mpll.clk, + [1] = &exynos5_clk_mout_cpll.clk, +}; + +struct clksrc_sources exynos5_clkset_usbdrd30 = { + .sources = exynos5_clkset_usbdrd30_list, + .nr_sources = ARRAY_SIZE(exynos5_clkset_usbdrd30_list), +}; + /* Possible clock sources for aclk_266_gscl_sub Mux */ static struct clk *clk_src_gscl_266_list[] = { [0] = &clk_ext_xtal_mux, @@ -1199,6 +1214,15 @@ static struct clksrc_clk exynos5_clksrcs[] = { .parent = &exynos5_clk_mout_cpll.clk, }, .reg_div = { .reg = EXYNOS5_CLKDIV_GEN, .shift = 4, .size = 3 }, + }, { + .clk = { + .name = "sclk_usbdrd30", + .enable = exynos5_clksrc_mask_fsys_ctrl, + .ctrlbit = (1 << 28), + }, + .sources = &exynos5_clkset_usbdrd30, + .reg_src = { .reg = EXYNOS5_CLKSRC_FSYS, .shift = 28, .size = 1 }, + .reg_div = { .reg = EXYNOS5_CLKDIV_FSYS0, .shift = 24, .size = 4 }, }, }; diff --git a/arch/arm/mach-exynos/common.c b/arch/arm/mach-exynos/common.c index 92d5e61..c17f1df 100644 --- a/arch/arm/mach-exynos/common.c +++ b/arch/arm/mach-exynos/common.c @@ -280,6 +280,11 @@ static struct map_desc exynos5_iodesc[] __initdata = { .pfn = __phys_to_pfn(EXYNOS5_PA_USB_PHY), .length = SZ_4K, .type = MT_DEVICE, + }, { + .virtual = (unsigned long)S5P_VA_DRD_PHY, + .pfn = __phys_to_pfn(EXYNOS5_PA_DRD_PHY), + .length = SZ_4K, + .type = MT_DEVICE, }, }; diff --git a/arch/arm/mach-exynos/include/mach/map.h b/arch/arm/mach-exynos/include/mach/map.h index 331ae57..b95b245 100644 --- a/arch/arm/mach-exynos/include/mach/map.h +++ b/arch/arm/mach-exynos/include/mach/map.h @@ -193,6 +193,7 @@ #define EXYNOS5_PA_UART 0x12C00000 #define EXYNOS5_PA_USB_PHY 0x12130000 +#define EXYNOS5_PA_DRD_PHY 0x12100000 #define EXYNOS4_PA_VP 0x12C00000 #define EXYNOS4_PA_MIXER 0x12C10000 diff --git a/arch/arm/mach-exynos/include/mach/regs-pmu.h b/arch/arm/mach-exynos/include/mach/regs-pmu.h index d4e392b..67132b4 100644 --- a/arch/arm/mach-exynos/include/mach/regs-pmu.h +++ b/arch/arm/mach-exynos/include/mach/regs-pmu.h @@ -39,6 +39,10 @@ #define S5P_HDMI_PHY_CONTROL S5P_PMUREG(0x0700) #define S5P_HDMI_PHY_ENABLE (1 << 0) +/* only for EXYNOS5250*/ +#define S5P_USBDRD_PHY_CONTROL S5P_PMUREG(0x0704) +#define S5P_USBDRD_PHY_ENABLE (1 << 0) + #define S5P_DAC_PHY_CONTROL S5P_PMUREG(0x070C) #define S5P_DAC_PHY_ENABLE (1 << 0) diff --git a/arch/arm/plat-samsung/include/plat/map-s5p.h b/arch/arm/plat-samsung/include/plat/map-s5p.h index c2d7bda..836863a 100644 --- a/arch/arm/plat-samsung/include/plat/map-s5p.h +++ b/arch/arm/plat-samsung/include/plat/map-s5p.h @@ -40,6 +40,8 @@ #define S5P_VA_GIC_CPU S3C_ADDR(0x02810000) #define S5P_VA_GIC_DIST S3C_ADDR(0x02820000) +#define S5P_VA_DRD_PHY S3C_ADDR(0x03000000) + #define VA_VIC(x) (S3C_VA_IRQ + ((x) * 0x10000)) #define VA_VIC0 VA_VIC(0) #define VA_VIC1 VA_VIC(1) diff --git a/drivers/usb/Kconfig b/drivers/usb/Kconfig index a7773a3..e9cbe34 100644 --- a/drivers/usb/Kconfig +++ b/drivers/usb/Kconfig @@ -53,6 +53,7 @@ config USB_ARCH_HAS_EHCI # some non-PCI HCDs implement xHCI config USB_ARCH_HAS_XHCI boolean + default y if ARCH_EXYNOS5 default PCI menuconfig USB_SUPPORT