From patchwork Fri Jul 20 09:20:24 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Aisheng Dong X-Patchwork-Id: 1220201 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-process-083081@patchwork2.kernel.org Received: from merlin.infradead.org (merlin.infradead.org [205.233.59.134]) by patchwork2.kernel.org (Postfix) with ESMTP id 9AFB3DF24C for ; Fri, 20 Jul 2012 09:40:22 +0000 (UTC) Received: from localhost ([::1] helo=merlin.infradead.org) by merlin.infradead.org with esmtp (Exim 4.76 #1 (Red Hat Linux)) id 1Ss9bW-0006Rr-Ha; Fri, 20 Jul 2012 09:34:34 +0000 Received: from am1ehsobe002.messaging.microsoft.com ([213.199.154.205] helo=am1outboundpool.messaging.microsoft.com) by merlin.infradead.org with esmtps (Exim 4.76 #1 (Red Hat Linux)) id 1Ss9Yi-00066G-Fn for linux-arm-kernel@lists.infradead.org; Fri, 20 Jul 2012 09:31:48 +0000 Received: from mail121-am1-R.bigfish.com (10.3.201.232) by AM1EHSOBE008.bigfish.com (10.3.204.28) with Microsoft SMTP Server id 14.1.225.23; Fri, 20 Jul 2012 09:31:28 +0000 Received: from mail121-am1 (localhost [127.0.0.1]) by mail121-am1-R.bigfish.com (Postfix) with ESMTP id BD0311E04DE; Fri, 20 Jul 2012 09:31:28 +0000 (UTC) X-Forefront-Antispam-Report: CIP:70.37.183.190; KIP:(null); UIP:(null); IPV:NLI; H:mail.freescale.net; RD:none; EFVD:NLI X-SpamScore: 3 X-BigFish: VS3(zzzz1202h1082kzz8275bh8275dhz2dh2a8h668h839hd24he5bhf0ah107ah) Received: from mail121-am1 (localhost.localdomain [127.0.0.1]) by mail121-am1 (MessageSwitch) id 1342776686923523_32248; Fri, 20 Jul 2012 09:31:26 +0000 (UTC) Received: from AM1EHSMHS010.bigfish.com (unknown [10.3.201.227]) by mail121-am1.bigfish.com (Postfix) with ESMTP id D8B81400F2; Fri, 20 Jul 2012 09:31:26 +0000 (UTC) Received: from mail.freescale.net (70.37.183.190) by AM1EHSMHS010.bigfish.com (10.3.207.110) with Microsoft SMTP Server (TLS) id 14.1.225.23; Fri, 20 Jul 2012 09:31:27 +0000 Received: from az84smr01.freescale.net (10.64.34.197) by 039-SN1MMR1-002.039d.mgd.msft.net (10.84.1.15) with Microsoft SMTP Server (TLS) id 14.2.298.5; Fri, 20 Jul 2012 04:31:23 -0500 Received: from localhost.localdomain (shlinux2.ap.freescale.net [10.192.224.44]) by az84smr01.freescale.net (8.14.3/8.14.0) with ESMTP id q6K9VHUv010017; Fri, 20 Jul 2012 02:31:21 -0700 From: Dong Aisheng To: Subject: [PATCH 1/4] ASoC: mxs-saif: fix clock prepare and enable unbalance issue Date: Fri, 20 Jul 2012 17:20:24 +0800 Message-ID: <1342776027-31758-2-git-send-email-b29396@freescale.com> X-Mailer: git-send-email 1.7.0.4 In-Reply-To: <1342776027-31758-1-git-send-email-b29396@freescale.com> References: <1342776027-31758-1-git-send-email-b29396@freescale.com> MIME-Version: 1.0 X-OriginatorOrg: freescale.com X-Spam-Note: CRM114 invocation failed X-Spam-Score: -2.6 (--) X-Spam-Report: SpamAssassin version 3.3.2 on merlin.infradead.org summary: Content analysis details: (-2.6 points) pts rule name description ---- ---------------------- -------------------------------------------------- -0.7 RCVD_IN_DNSWL_LOW RBL: Sender listed at http://www.dnswl.org/, low trust [213.199.154.205 listed in list.dnswl.org] -1.9 BAYES_00 BODY: Bayes spam probability is 0 to 1% [score: 0.0000] Cc: alsa-devel@alsa-project.org, broonie@opensource.wolfsonmicro.com, lrg@ti.com, shawn.guo@freescale.com, w.sang@pengutronix.de X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: linux-arm-kernel-bounces@lists.infradead.org Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org From: Dong Aisheng Currently we directly call a clock_enable in trigger function without a clk_prepare as pair first. This will cause system hang immediately when run capture because the clock was not prepared(playback does not hang because the clock was prepared already by get_mclk before), a warning message in clock framework may cause a deadlock to reclaim clock lock (see: pl011_console_write). Here we prepare clock first in hw_param, then enable it in trigger function to guarantee the balance. Cc: Mark Brown Cc: Liam Girdwood Cc: Wolfram Sang Cc: Shawn Guo Signed-off-by: Dong Aisheng Acked-by: Shawn Guo --- sound/soc/mxs/mxs-saif.c | 10 ++++++++++ 1 files changed, 10 insertions(+), 0 deletions(-) diff --git a/sound/soc/mxs/mxs-saif.c b/sound/soc/mxs/mxs-saif.c index aba71bf..fdbb36a 100644 --- a/sound/soc/mxs/mxs-saif.c +++ b/sound/soc/mxs/mxs-saif.c @@ -394,9 +394,14 @@ static int mxs_saif_hw_params(struct snd_pcm_substream *substream, struct snd_soc_dai *cpu_dai) { struct mxs_saif *saif = snd_soc_dai_get_drvdata(cpu_dai); + struct mxs_saif *master_saif; u32 scr, stat; int ret; + master_saif = mxs_saif_get_master(saif); + if (!master_saif) + return -EINVAL; + /* mclk should already be set */ if (!saif->mclk && saif->mclk_in_use) { dev_err(cpu_dai->dev, "set mclk first\n"); @@ -420,6 +425,11 @@ static int mxs_saif_hw_params(struct snd_pcm_substream *substream, return ret; } + /* prepare clk in hw_param, enable in trigger */ + clk_prepare(saif->clk); + if (saif != master_saif) + clk_prepare(master_saif->clk); + scr = __raw_readl(saif->base + SAIF_CTRL); scr &= ~BM_SAIF_CTRL_WORD_LENGTH;