From patchwork Wed Jul 25 12:37:44 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dirk Behme X-Patchwork-Id: 1237301 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-process-083081@patchwork2.kernel.org Received: from merlin.infradead.org (merlin.infradead.org [205.233.59.134]) by patchwork2.kernel.org (Postfix) with ESMTP id 4F7C0DFFCD for ; Wed, 25 Jul 2012 12:43:42 +0000 (UTC) Received: from localhost ([::1] helo=merlin.infradead.org) by merlin.infradead.org with esmtp (Exim 4.76 #1 (Red Hat Linux)) id 1Su0r6-00075w-KX; Wed, 25 Jul 2012 12:38:20 +0000 Received: from smtp2-v.fe.bosch.de ([139.15.237.6]) by merlin.infradead.org with esmtps (Exim 4.76 #1 (Red Hat Linux)) id 1Su0ql-00075V-5J for linux-arm-kernel@lists.infradead.org; Wed, 25 Jul 2012 12:38:06 +0000 Received: from vsmta14.fe.internet.bosch.com (unknown [10.4.98.30]) by imta24.fe.bosch.de (Postfix) with ESMTP id 5099DB00002 for ; Wed, 25 Jul 2012 14:37:54 +0200 (CEST) Received: from localhost (vsgw1.fe.internet.bosch.com [10.4.98.15]) by vsmta14.fe.internet.bosch.com (Postfix) with SMTP id 3A0951B408F1 for ; Wed, 25 Jul 2012 14:37:54 +0200 (CEST) Received: from SI-HUB1001.de.bosch.com (10.4.103.108) by si-hub05.de.bosch.com (10.3.153.47) with Microsoft SMTP Server (TLS) id 8.3.264.0; Wed, 25 Jul 2012 14:37:51 +0200 Received: from hi-z5661.hi.de.bosch.com (10.34.219.178) by SI-HUB1001.de.bosch.com (10.4.103.108) with Microsoft SMTP Server id 14.2.309.2; Wed, 25 Jul 2012 14:37:50 +0200 Received: from localhost.localdomain (localhost [127.0.0.1]) by hi-z5661.hi.de.bosch.com (Postfix) with ESMTP id E02D14041F; Wed, 25 Jul 2012 14:37:49 +0200 (CEST) From: Dirk Behme To: Subject: [PATCH 2/2] ARM: dts: imx6q: Invert the GPIO controller order Date: Wed, 25 Jul 2012 14:37:44 +0200 Message-ID: <1343219864-3040-2-git-send-email-dirk.behme@de.bosch.com> X-Mailer: git-send-email 1.7.0.4 In-Reply-To: <1343219864-3040-1-git-send-email-dirk.behme@de.bosch.com> References: <1343219864-3040-1-git-send-email-dirk.behme@de.bosch.com> MIME-Version: 1.0 X-Spam-Note: CRM114 invocation failed X-Spam-Score: -6.9 (------) X-Spam-Report: SpamAssassin version 3.3.2 on merlin.infradead.org summary: Content analysis details: (-6.9 points) pts rule name description ---- ---------------------- -------------------------------------------------- -5.0 RCVD_IN_DNSWL_HI RBL: Sender listed at http://www.dnswl.org/, high trust [139.15.237.6 listed in list.dnswl.org] -0.0 SPF_PASS SPF: sender matches SPF record -1.9 BAYES_00 BODY: Bayes spam probability is 0 to 1% [score: 0.0000] Cc: Shawn Guo , Matthias Thomae X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: linux-arm-kernel-bounces@lists.infradead.org Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org From: Matthias Thomae The GPIO controllers in the device tree are registered dynamically via gpiochip_add and gpiochip_find_base in descending order (from ARCH_NR_GPIO to 0). This change reorders the controllers in the device tree (from gpio7 to gpio1) so that they finally appear in ascending order after registration. Signed-off-by: Matthias Thomae CC: Shawn Guo --- arch/arm/boot/dts/imx6q.dtsi | 36 ++++++++++++++++++------------------ 1 files changed, 18 insertions(+), 18 deletions(-) diff --git a/arch/arm/boot/dts/imx6q.dtsi b/arch/arm/boot/dts/imx6q.dtsi index c25d495..7c908c1 100644 --- a/arch/arm/boot/dts/imx6q.dtsi +++ b/arch/arm/boot/dts/imx6q.dtsi @@ -276,30 +276,30 @@ interrupts = <0 55 0x04>; }; - gpio1: gpio@0209c000 { + gpio7: gpio@020b4000 { compatible = "fsl,imx6q-gpio", "fsl,imx31-gpio"; - reg = <0x0209c000 0x4000>; - interrupts = <0 66 0x04 0 67 0x04>; + reg = <0x020b4000 0x4000>; + interrupts = <0 78 0x04 0 79 0x04>; gpio-controller; #gpio-cells = <2>; interrupt-controller; #interrupt-cells = <2>; }; - gpio2: gpio@020a0000 { + gpio6: gpio@020b0000 { compatible = "fsl,imx6q-gpio", "fsl,imx31-gpio"; - reg = <0x020a0000 0x4000>; - interrupts = <0 68 0x04 0 69 0x04>; + reg = <0x020b0000 0x4000>; + interrupts = <0 76 0x04 0 77 0x04>; gpio-controller; #gpio-cells = <2>; interrupt-controller; #interrupt-cells = <2>; }; - gpio3: gpio@020a4000 { + gpio5: gpio@020ac000 { compatible = "fsl,imx6q-gpio", "fsl,imx31-gpio"; - reg = <0x020a4000 0x4000>; - interrupts = <0 70 0x04 0 71 0x04>; + reg = <0x020ac000 0x4000>; + interrupts = <0 74 0x04 0 75 0x04>; gpio-controller; #gpio-cells = <2>; interrupt-controller; @@ -316,30 +316,30 @@ #interrupt-cells = <2>; }; - gpio5: gpio@020ac000 { + gpio3: gpio@020a4000 { compatible = "fsl,imx6q-gpio", "fsl,imx31-gpio"; - reg = <0x020ac000 0x4000>; - interrupts = <0 74 0x04 0 75 0x04>; + reg = <0x020a4000 0x4000>; + interrupts = <0 70 0x04 0 71 0x04>; gpio-controller; #gpio-cells = <2>; interrupt-controller; #interrupt-cells = <2>; }; - gpio6: gpio@020b0000 { + gpio2: gpio@020a0000 { compatible = "fsl,imx6q-gpio", "fsl,imx31-gpio"; - reg = <0x020b0000 0x4000>; - interrupts = <0 76 0x04 0 77 0x04>; + reg = <0x020a0000 0x4000>; + interrupts = <0 68 0x04 0 69 0x04>; gpio-controller; #gpio-cells = <2>; interrupt-controller; #interrupt-cells = <2>; }; - gpio7: gpio@020b4000 { + gpio1: gpio@0209c000 { compatible = "fsl,imx6q-gpio", "fsl,imx31-gpio"; - reg = <0x020b4000 0x4000>; - interrupts = <0 78 0x04 0 79 0x04>; + reg = <0x0209c000 0x4000>; + interrupts = <0 66 0x04 0 67 0x04>; gpio-controller; #gpio-cells = <2>; interrupt-controller;