From patchwork Sun Aug 5 23:03:31 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Anton Vorontsov X-Patchwork-Id: 1275921 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-process-083081@patchwork2.kernel.org Received: from merlin.infradead.org (merlin.infradead.org [205.233.59.134]) by patchwork2.kernel.org (Postfix) with ESMTP id 9305FDF27F for ; Sun, 5 Aug 2012 23:09:26 +0000 (UTC) Received: from localhost ([::1] helo=merlin.infradead.org) by merlin.infradead.org with esmtp (Exim 4.76 #1 (Red Hat Linux)) id 1Sy9uA-0007Cr-TU; Sun, 05 Aug 2012 23:06:38 +0000 Received: from mail-pb0-f49.google.com ([209.85.160.49]) by merlin.infradead.org with esmtps (Exim 4.76 #1 (Red Hat Linux)) id 1Sy9u6-0007C3-Hd for linux-arm-kernel@lists.infradead.org; Sun, 05 Aug 2012 23:06:36 +0000 Received: by pbbrq13 with SMTP id rq13so4890513pbb.36 for ; Sun, 05 Aug 2012 16:06:33 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20120113; h=from:to:cc:subject:date:message-id:x-mailer:in-reply-to:references :x-gm-message-state; bh=p2lRaFGLs0yKWu+NuopH6i/AD22B7D+adNaTUxfNA1s=; b=l6aToSKTtTmNvwfZV8W5kFB/yFik2uDdXsyNvlDypE/7Q+AJcgkXeRZceb6L5jqykJ vsJsveh7RSXkNE8vVme8W/Y7s9xen84p4RwufkK/sRhGRpQL8irpRGcaM4d+8F3qSQW1 qZKhGh5Yv1ZUyN9lY7RN7h6JNGbqnPH7w8muAhJEGjeoClmhYwx6VD+g7i3sDyLUwYYB bHVFGVCNfbRuQEJ1uQGl88gcgH7J0SQ8PqqrEy0h7j0qpEnNqTBNSXjGxJBWHUMvRt02 kzxlGLJWQoipWCxCaO7MbHp4TUoezblVBRt36TEY5noIG4PGFUqNN+X77C1LY4mBMgun ocAw== Received: by 10.68.218.7 with SMTP id pc7mr14457052pbc.88.1344207993139; Sun, 05 Aug 2012 16:06:33 -0700 (PDT) Received: from localhost (m9f0536d0.tmodns.net. [208.54.5.159]) by mx.google.com with ESMTPS id og4sm7584687pbb.48.2012.08.05.16.06.18 (version=TLSv1/SSLv3 cipher=OTHER); Sun, 05 Aug 2012 16:06:32 -0700 (PDT) From: Anton Vorontsov To: Russell King Subject: [PATCH 1/9] ARM: mach-rpc: Don't register FIQs with genirq Date: Sun, 5 Aug 2012 16:03:31 -0700 Message-Id: <1344207819-3415-1-git-send-email-anton.vorontsov@linaro.org> X-Mailer: git-send-email 1.7.10.4 In-Reply-To: <20120805230238.GA1663@lizard> References: <20120805230238.GA1663@lizard> X-Gm-Message-State: ALoCoQklzWU8nfP5RcH1QX2zbmnhfIBQa3zf/u0Gt5/y5w+L4/dBDA44mE6UYhYIXQMcWJYiWZY1 X-Spam-Note: CRM114 invocation failed X-Spam-Score: -2.6 (--) X-Spam-Report: SpamAssassin version 3.3.2 on merlin.infradead.org summary: Content analysis details: (-2.6 points) pts rule name description ---- ---------------------- -------------------------------------------------- -0.7 RCVD_IN_DNSWL_LOW RBL: Sender listed at http://www.dnswl.org/, low trust [209.85.160.49 listed in list.dnswl.org] -1.9 BAYES_00 BODY: Bayes spam probability is 0 to 1% [score: 0.0000] Cc: linaro-kernel@lists.linaro.org, Sascha Hauer , patches@linaro.org, Tony Lindgren , Mark Brown , linux-kernel@vger.kernel.org, Kukjin Kim , John Stultz , Ben Dooks , kernel-team@android.com, Liam Girdwood , linux-arm-kernel@lists.infradead.org X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: linux-arm-kernel-bounces@lists.infradead.org Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org mach-rps registers FIQ controller with genirq, which makes no sense: these FIQs cannot be routed to IRQs, so there is no need to register it with genirq. This effectively makes FIQ_START irrelevant. Signed-off-by: Anton Vorontsov --- arch/arm/mach-rpc/dma.c | 4 ++-- arch/arm/mach-rpc/include/mach/irqs.h | 5 +++++ arch/arm/mach-rpc/irq.c | 19 ++++--------------- 3 files changed, 11 insertions(+), 17 deletions(-) diff --git a/arch/arm/mach-rpc/dma.c b/arch/arm/mach-rpc/dma.c index 85883b2..4a525be 100644 --- a/arch/arm/mach-rpc/dma.c +++ b/arch/arm/mach-rpc/dma.c @@ -289,13 +289,13 @@ static void floppy_enable_dma(unsigned int chan, dma_t *dma) set_fiq_handler(fiqhandler_start, fiqhandler_length); set_fiq_regs(®s); - enable_fiq(fdma->fiq); + iomd_unmask_fiq(fdma->fiq); } static void floppy_disable_dma(unsigned int chan, dma_t *dma) { struct floppy_dma *fdma = container_of(dma, struct floppy_dma, dma); - disable_fiq(fdma->fiq); + iomd_mask_fiq(fdma->fiq); release_fiq(&fh); } diff --git a/arch/arm/mach-rpc/include/mach/irqs.h b/arch/arm/mach-rpc/include/mach/irqs.h index 6868e17..f27ead1 100644 --- a/arch/arm/mach-rpc/include/mach/irqs.h +++ b/arch/arm/mach-rpc/include/mach/irqs.h @@ -37,6 +37,11 @@ #define FIQ_EXPANSIONCARD 6 #define FIQ_FORCE 7 +#ifndef __ASSEMBLY__ +extern void iomd_mask_fiq(int fiq); +extern void iomd_unmask_fiq(int fiq); +#endif + /* * This is the offset of the FIQ "IRQ" numbers */ diff --git a/arch/arm/mach-rpc/irq.c b/arch/arm/mach-rpc/irq.c index 3e4fa84..a4221b3 100644 --- a/arch/arm/mach-rpc/irq.c +++ b/arch/arm/mach-rpc/irq.c @@ -89,30 +89,24 @@ static struct irq_chip iomd_dma_chip = { .irq_unmask = iomd_unmask_irq_dma, }; -static void iomd_mask_irq_fiq(struct irq_data *d) +void iomd_mask_fiq(int fiq) { unsigned int val, mask; - mask = 1 << (d->irq & 7); + mask = 1 << (fiq & 7); val = iomd_readb(IOMD_FIQMASK); iomd_writeb(val & ~mask, IOMD_FIQMASK); } -static void iomd_unmask_irq_fiq(struct irq_data *d) +void iomd_unmask_fiq(int fiq) { unsigned int val, mask; - mask = 1 << (d->irq & 7); + mask = 1 << (fiq & 7); val = iomd_readb(IOMD_FIQMASK); iomd_writeb(val | mask, IOMD_FIQMASK); } -static struct irq_chip iomd_fiq_chip = { - .irq_ack = iomd_mask_irq_fiq, - .irq_mask = iomd_mask_irq_fiq, - .irq_unmask = iomd_unmask_irq_fiq, -}; - extern unsigned char rpc_default_fiq_start, rpc_default_fiq_end; void __init rpc_init_irq(void) @@ -155,11 +149,6 @@ void __init rpc_init_irq(void) handle_level_irq); set_irq_flags(irq, flags); break; - - case 64 ... 71: - irq_set_chip(irq, &iomd_fiq_chip); - set_irq_flags(irq, IRQF_VALID); - break; } }