From patchwork Mon Aug 6 12:23:32 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sebastian Hesselbarth X-Patchwork-Id: 1278731 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-process-083081@patchwork2.kernel.org Received: from merlin.infradead.org (merlin.infradead.org [205.233.59.134]) by patchwork2.kernel.org (Postfix) with ESMTP id A5631DF215 for ; Mon, 6 Aug 2012 12:27:37 +0000 (UTC) Received: from localhost ([::1] helo=merlin.infradead.org) by merlin.infradead.org with esmtp (Exim 4.76 #1 (Red Hat Linux)) id 1SyMMP-0001dD-2d; Mon, 06 Aug 2012 12:24:37 +0000 Received: from mail-bk0-f49.google.com ([209.85.214.49]) by merlin.infradead.org with esmtps (Exim 4.76 #1 (Red Hat Linux)) id 1SyMLw-0001WJ-Mx for linux-arm-kernel@lists.infradead.org; Mon, 06 Aug 2012 12:24:10 +0000 Received: by mail-bk0-f49.google.com with SMTP id ji2so1168040bkc.36 for ; Mon, 06 Aug 2012 05:24:08 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=from:to:cc:subject:date:message-id:x-mailer:in-reply-to:references; bh=imfI2IKpgVj+7Gyu+Hfiss2nMpqCrwVgH9fiazJD3c0=; b=NyjIm52X07slinpcAfks/mUx4rHedqhifr1AQ3HBqyH9jgKB5Ev6vuARTJXnr99kPT X9d4Jqdlv0If6LK3Bhcs5aE/Tk5MK37XckNqfb1Dz7YoGwmZxSfL0b/5MAT72kTPUd+l 5MOD5U8TnuuIFWfV74wBnNXHdjTxp9RaiWC1YzGK2wGYmaqhB0FekNnHGQr5yK02SMXC 4qC0v3tg32VTaWndVgQXi2jHosizwoyilSO3NsSPPSaQQirbxrMgWG7efm56CMerkng5 9F1M4UUeE33sFj2rjIoQBCHXpd6C9Brhfk7Xv4W0zI7OSV997RSCxLbsiYXC5kaYgF5D uRuQ== Received: by 10.204.130.156 with SMTP id t28mr4142537bks.33.1344255848277; Mon, 06 Aug 2012 05:24:08 -0700 (PDT) Received: from edge.mip.uni-hannover.de (ip116.244.mip.uni-hannover.de. [130.75.244.116]) by mx.google.com with ESMTPS id hg13sm7341595bkc.7.2012.08.06.05.24.04 (version=TLSv1/SSLv3 cipher=OTHER); Mon, 06 Aug 2012 05:24:06 -0700 (PDT) From: Sebastian Hesselbarth To: Sebastian Hesselbarth Subject: [PATCH 4/6] ARM: dove: add device tree based machine descriptor Date: Mon, 6 Aug 2012 14:23:32 +0200 Message-Id: <1344255815-4457-5-git-send-email-sebastian.hesselbarth@gmail.com> X-Mailer: git-send-email 1.7.10.4 In-Reply-To: <1344255815-4457-1-git-send-email-sebastian.hesselbarth@gmail.com> References: <1344255815-4457-1-git-send-email-sebastian.hesselbarth@gmail.com> X-Spam-Note: CRM114 invocation failed X-Spam-Score: -2.7 (--) X-Spam-Report: SpamAssassin version 3.3.2 on merlin.infradead.org summary: Content analysis details: (-2.7 points) pts rule name description ---- ---------------------- -------------------------------------------------- -0.7 RCVD_IN_DNSWL_LOW RBL: Sender listed at http://www.dnswl.org/, low trust [209.85.214.49 listed in list.dnswl.org] 0.0 FREEMAIL_FROM Sender email is commonly abused enduser mail provider (sebastian.hesselbarth[at]gmail.com) -0.0 SPF_PASS SPF: sender matches SPF record -1.9 BAYES_00 BODY: Bayes spam probability is 0 to 1% [score: 0.0000] -0.1 DKIM_VALID_AU Message has a valid DKIM or DK signature from author's domain 0.1 DKIM_SIGNED Message has a DKIM or DK signature, not necessarily valid -0.1 DKIM_VALID Message has at least one valid DKIM or DK signature Cc: Andrew Lunn , Russell King , Jason Cooper , Arnd Bergmann , linux-kernel@vger.kernel.org, Rabeeh Khoury , Maen Suleiman , Olof Johansson , Ian Molton , linux-arm-kernel@lists.infradead.org X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: linux-arm-kernel-bounces@lists.infradead.org Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org This adds a generic DT_MACHINE for mach-dove. As with other orion based SoCs there still is some glue code required to make all internal devices work, i.e. auxdata is provided to pass clocks to corresponding device drivers. Signed-off-by: Sebastian Hesselbarth Cc: Russell King Cc: Jason Cooper Cc: Andrew Lunn Cc: linux-arm-kernel@lists.infradead.org Cc: linux-kernel@vger.kernel.org Cc: Rabeeh Khoury Cc: Ian Molton Cc: Arnd Bergmann Cc: Maen Suleiman Cc: Olof Johansson --- arch/arm/mach-dove/Kconfig | 7 +++++ arch/arm/mach-dove/common.c | 67 +++++++++++++++++++++++++++++++++++++++++++ 2 files changed, 74 insertions(+) diff --git a/arch/arm/mach-dove/Kconfig b/arch/arm/mach-dove/Kconfig index dd937c5..00154e7 100644 --- a/arch/arm/mach-dove/Kconfig +++ b/arch/arm/mach-dove/Kconfig @@ -15,6 +15,13 @@ config MACH_CM_A510 Say 'Y' here if you want your kernel to support the CompuLab CM-A510 Board. +config MACH_DOVE_DT + bool "Marvell Dove Flattened Device Tree" + select USE_OF + help + Say 'Y' here if you want your kernel to support the + Marvell Dove using flattened device tree. + endmenu endif diff --git a/arch/arm/mach-dove/common.c b/arch/arm/mach-dove/common.c index 6f2fe65..6f594bd3 100644 --- a/arch/arm/mach-dove/common.c +++ b/arch/arm/mach-dove/common.c @@ -17,6 +17,8 @@ #include #include #include +#include +#include #include #include #include @@ -30,6 +32,7 @@ #include #include #include +#include #include #include #include @@ -384,3 +387,67 @@ void dove_restart(char mode, const char *cmd) while (1) ; } + +#if defined(CONFIG_MACH_DOVE_DT) +/* + * Auxdata required until real OF clock provider + */ +struct of_dev_auxdata dove_auxdata_lookup[] __initdata = { + OF_DEV_AUXDATA("marvell,orion-spi", 0xf1010600, "orion_spi.0", NULL), + OF_DEV_AUXDATA("marvell,orion-spi", 0xf1014600, "orion_spi.1", NULL), + OF_DEV_AUXDATA("marvell,orion-wdt", 0xf1020300, "orion_wdt", NULL), + OF_DEV_AUXDATA("marvell,mv64xxx-i2c", 0xf1011000, "mv64xxx_i2c.0", + NULL), + OF_DEV_AUXDATA("marvell,orion-sata", 0xf10a0000, "sata_mv.0", NULL), + OF_DEV_AUXDATA("marvell,dove-sdhci", 0xf1092000, "sdhci-dove.0", NULL), + OF_DEV_AUXDATA("marvell,dove-sdhci", 0xf1090000, "sdhci-dove.1", NULL), + {}, +}; + +static struct mv643xx_eth_platform_data dove_dt_ge00_data = { + .phy_addr = MV643XX_ETH_PHY_ADDR_DEFAULT, +}; + +static void __init dove_dt_init(void) +{ + pr_info("Dove 88AP510 SoC, TCLK = %d MHz.\n", + (dove_tclk + 499999) / 1000000); + +#ifdef CONFIG_CACHE_TAUROS2 + tauros2_init(); +#endif + dove_setup_cpu_mbus(); + + /* Setup root of clk tree */ + dove_clk_init(); + + /* Internal devices not ported to DT yet */ + dove_rtc_init(); + dove_xor0_init(); + dove_xor1_init(); + + dove_ge00_init(&dove_dt_ge00_data); + dove_ehci0_init(); + dove_ehci1_init(); + dove_pcie_init(1, 1); + dove_crypto_init(); + + of_platform_populate(NULL, of_default_bus_match_table, + dove_auxdata_lookup, NULL); +} + +static const char * const dove_dt_board_compat[] = { + "marvell,dove", + NULL +}; + +DT_MACHINE_START(DOVE_DT, "Marvell Dove (Flattened Device Tree)") + .map_io = dove_map_io, + .init_early = dove_init_early, + .init_irq = orion_dt_init_irq, + .timer = &dove_timer, + .init_machine = dove_dt_init, + .restart = dove_restart, + .dt_compat = dove_dt_board_compat, +MACHINE_END +#endif