From patchwork Tue Aug 7 22:45:13 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Matt Sealey X-Patchwork-Id: 1289971 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-process-083081@patchwork2.kernel.org Received: from merlin.infradead.org (merlin.infradead.org [205.233.59.134]) by patchwork2.kernel.org (Postfix) with ESMTP id A63F6DF280 for ; Tue, 7 Aug 2012 22:48:53 +0000 (UTC) Received: from localhost ([::1] helo=merlin.infradead.org) by merlin.infradead.org with esmtp (Exim 4.76 #1 (Red Hat Linux)) id 1SysX2-0000b0-If; Tue, 07 Aug 2012 22:45:44 +0000 Received: from mail-ob0-f177.google.com ([209.85.214.177]) by merlin.infradead.org with esmtps (Exim 4.76 #1 (Red Hat Linux)) id 1SysWp-0000YN-DT for linux-arm-kernel@lists.infradead.org; Tue, 07 Aug 2012 22:45:32 +0000 Received: by obbta17 with SMTP id ta17so222289obb.36 for ; Tue, 07 Aug 2012 15:45:30 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20120113; h=from:to:cc:subject:date:message-id:x-mailer:in-reply-to:references :x-gm-message-state; bh=bpAJPJPWk+0Q9IlfAiSjgD6nJZLCQHE6xJ6WgBazJ4Q=; b=cGzNo29cS5RuAmRtYgWPtyyOkPzx0wRIBrwFQTfpxsmvZp3RMS5HCWy0dbWUHkhMPJ S73LkiPyocmbvOHswXh/N1+EOA3i06nY5j7jZhZuo1Kx8FxHwRF6DK68bC47ZTlLX4K2 OJQ2+Qp59mKohrX0JmNUCkZdjul/HsBSVtlE4+xewonsWgLImhX+yOdQknk2Uy8NezuG gh88YDQqoUluim70k7b0xnIQTLS0+XFUr4UcDA3aL3r0yIrsEBicrN++PjDhpo9u8c4D ZwYpXP/Hks+S6ea9zJgK6xyFT+kgiC7wUHxojQCO2qVl77lBc2nBr4YyihO9i6SI+zd9 DC4g== Received: by 10.60.8.8 with SMTP id n8mr27595387oea.38.1344379530798; Tue, 07 Aug 2012 15:45:30 -0700 (PDT) Received: from shinji.genesi-usa.com ([199.193.222.22]) by mx.google.com with ESMTPS id qd7sm21070387obc.5.2012.08.07.15.45.29 (version=TLSv1/SSLv3 cipher=OTHER); Tue, 07 Aug 2012 15:45:30 -0700 (PDT) From: Matt Sealey To: Linux ARM Kernel Mailing List Subject: [PATCH 1/2] ARM: build ssi-fiq.S in ARM mode to prevent CONFIG_THUMB2_KERNEL build breakage Date: Tue, 7 Aug 2012 17:45:13 -0500 Message-Id: <1344379514-30076-2-git-send-email-matt@genesi-usa.com> X-Mailer: git-send-email 1.7.9.5 In-Reply-To: <1344379514-30076-1-git-send-email-matt@genesi-usa.com> References: <1344379514-30076-1-git-send-email-matt@genesi-usa.com> X-Gm-Message-State: ALoCoQnRYss/PdqVJPudhTD32Dc4uHYDFhW7+JLVqSzXxlgP0wtUpY3EtN62hM8zgUFODIMZJQ3o X-Spam-Note: CRM114 invocation failed X-Spam-Score: -2.6 (--) X-Spam-Report: SpamAssassin version 3.3.2 on merlin.infradead.org summary: Content analysis details: (-2.6 points) pts rule name description ---- ---------------------- -------------------------------------------------- -0.7 RCVD_IN_DNSWL_LOW RBL: Sender listed at http://www.dnswl.org/, low trust [209.85.214.177 listed in list.dnswl.org] -1.9 BAYES_00 BODY: Bayes spam probability is 0 to 1% [score: 0.0000] Cc: Dave Martin , Steev Klimaszewski , Mark Brown , Linux Kernel Mailing List , Anton Vorontsov , Sascha Hauer , Matt Sealey , Shawn Guo X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: linux-arm-kernel-bounces@lists.infradead.org Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org If i.MX SSI FIQ support is enabled then it is impossible to build a Thumb2 kernel image due to the code not being written with Thumb2 in mind (over-use of registers). In order not to break Thumb2 kernels, compile this as ARM. All the processors which require this support will run ARM code so there is no problem at runtime in doing this, even if it does produce a strange mix of code that may not be desired. In theory this should only be needed on configs based on imx_v4_v5_defconfig where CONFIG_THUMB2_KERNEL cannot be selected anyway since these SoCs do not have ARM cores capable of running Thumb2 code. This also makes rewriting the code as Thumb-compatible kind of redundant. But since one Eukrea board audio driver needs it, and there is an i.MX51 CPU module for this board, it gets pulled in for imx_v6_v7_defconfig too, making this a necessity. Signed-off-by: Matt Sealey --- arch/arm/plat-mxc/ssi-fiq.S | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/arm/plat-mxc/ssi-fiq.S b/arch/arm/plat-mxc/ssi-fiq.S index 8397a2d..ac09af8 100644 --- a/arch/arm/plat-mxc/ssi-fiq.S +++ b/arch/arm/plat-mxc/ssi-fiq.S @@ -28,6 +28,7 @@ #define SSI_SIER_RFF0_EN (1 << 2) .text + .arm .global imx_ssi_fiq_start .global imx_ssi_fiq_end .global imx_ssi_fiq_base