diff mbox

[13/14] arm: at91: dt: at91sam9 add nand pinctrl support

Message ID 1344603731-32667-13-git-send-email-plagnioj@jcrosoft.com (mailing list archive)
State New, archived
Headers show

Commit Message

Jean-Christophe PLAGNIOL-VILLARD Aug. 10, 2012, 1:02 p.m. UTC
Cc: Linus Walleij <linus.walleij@linaro.org>
Cc: Nicolas Ferre <nicolas.ferre@atmel.com>
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
---
 arch/arm/boot/dts/at91sam9260.dtsi |   10 ++++++++++
 arch/arm/boot/dts/at91sam9263.dtsi |   10 ++++++++++
 arch/arm/boot/dts/at91sam9g45.dtsi |   10 ++++++++++
 arch/arm/boot/dts/at91sam9n12.dtsi |   10 ++++++++++
 arch/arm/boot/dts/at91sam9x5.dtsi  |   10 ++++++++++
 5 files changed, 50 insertions(+)

Comments

Linus Walleij Aug. 15, 2012, 9:06 a.m. UTC | #1
On Fri, Aug 10, 2012 at 3:02 PM, Jean-Christophe PLAGNIOL-VILLARD
<plagnioj@jcrosoft.com> wrote:

> Cc: Linus Walleij <linus.walleij@linaro.org>
> Cc: Nicolas Ferre <nicolas.ferre@atmel.com>
> Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
(...)
> +                               nand {
> +                                       pinctrl_nand: nand-0 {
> +                                               atmel,pins =
> +                                                       <2 13 0x0 0x1   /* PC13 gpio RDY pin pull_up */
> +                                                        2 14 0x0 0x1>; /* PC14 gpio enable pin pull_up */
> +                                       };
> +                               };

Again magic hex I don't understand so skipping this patch -> Nicolas.

Yours,
Linus Walleij
Richard Genoud Aug. 16, 2012, 3:19 p.m. UTC | #2
2012/8/15 Linus Walleij <linus.walleij@linaro.org>:
> On Fri, Aug 10, 2012 at 3:02 PM, Jean-Christophe PLAGNIOL-VILLARD
> <plagnioj@jcrosoft.com> wrote:
>
>> Cc: Linus Walleij <linus.walleij@linaro.org>
>> Cc: Nicolas Ferre <nicolas.ferre@atmel.com>
>> Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
> (...)
>> +                               nand {
>> +                                       pinctrl_nand: nand-0 {
>> +                                               atmel,pins =
>> +                                                       <2 13 0x0 0x1   /* PC13 gpio RDY pin pull_up */
>> +                                                        2 14 0x0 0x1>; /* PC14 gpio enable pin pull_up */
>> +                                       };
>> +                               };
>
> Again magic hex I don't understand so skipping this patch -> Nicolas.

Maybe it will be more readable if we use something like :
atmel,pull-up;
atmel,multidrive;
atmel,mux="GPIO"
atmel,mux="A"
...
just my 2 cents...


Richard.
Jean-Christophe PLAGNIOL-VILLARD Aug. 16, 2012, 5:38 p.m. UTC | #3
On 17:19 Thu 16 Aug     , Richard Genoud wrote:
> 2012/8/15 Linus Walleij <linus.walleij@linaro.org>:
> > On Fri, Aug 10, 2012 at 3:02 PM, Jean-Christophe PLAGNIOL-VILLARD
> > <plagnioj@jcrosoft.com> wrote:
> >
> >> Cc: Linus Walleij <linus.walleij@linaro.org>
> >> Cc: Nicolas Ferre <nicolas.ferre@atmel.com>
> >> Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
> > (...)
> >> +                               nand {
> >> +                                       pinctrl_nand: nand-0 {
> >> +                                               atmel,pins =
> >> +                                                       <2 13 0x0 0x1   /* PC13 gpio RDY pin pull_up */
> >> +                                                        2 14 0x0 0x1>; /* PC14 gpio enable pin pull_up */
> >> +                                       };
> >> +                               };
> >
> > Again magic hex I don't understand so skipping this patch -> Nicolas.
> 
> Maybe it will be more readable if we use something like :
> atmel,pull-up;
> atmel,multidrive;
> atmel,mux="GPIO"
> atmel,mux="A"
> ...
> just my 2 cents...
no too much data and too much node as you will need a node per pin which we
tyr to avoid

Best Regards,
J.
Richard Genoud Aug. 17, 2012, 6:53 a.m. UTC | #4
2012/8/16 Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>:
>> Maybe it will be more readable if we use something like :
>> atmel,pull-up;
>> atmel,multidrive;
>> atmel,mux="GPIO"
>> atmel,mux="A"
>> ...
>> just my 2 cents...
> no too much data and too much node as you will need a node per pin which we
> tyr to avoid

One one hand we've got a DTS quite concise but unreadable, and on the
other hand, something understandable but huge.
( and it's not specific to your patch Jean-Christophe, on imx6q.dtsi,
it looks worse )
I'm just trying to make sure that having a DTS like that :
nand {
	pinctrl_nand: nand-0 {
		atmel,pins =
			<2 13 0x0 0x1   /* PC13 gpio RDY pin pull_up */
			2 14 0x0 0x1>; /* PC14 gpio enable pin pull_up */
	};
};
is better than :
nand {
	pinctrl_nand: nand-0 {
		nand_rdy { atmel,bank = "C"; atmel,pin = <13>; atmel,mux = "GPIO";
atmel,pull-up; };
		nand_ena { atmel,bank = "C"; atmel,pin = <14>; atmel,mux = "GPIO";
atmel,pull-up; };
	};
};
It's what you did in 1st place on linux-at91 git, and I kinda liked it.
But yeah, it's more verbose, and some lines will go beyond 80 columns,
but that's already the case.

Best regards,

Richard.
Jean-Christophe PLAGNIOL-VILLARD Aug. 20, 2012, 7:58 a.m. UTC | #5
On 08:53 Fri 17 Aug     , Richard Genoud wrote:
> 2012/8/16 Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>:
> >> Maybe it will be more readable if we use something like :
> >> atmel,pull-up;
> >> atmel,multidrive;
> >> atmel,mux="GPIO"
> >> atmel,mux="A"
> >> ...
> >> just my 2 cents...
> > no too much data and too much node as you will need a node per pin which we
> > tyr to avoid
> 
> One one hand we've got a DTS quite concise but unreadable, and on the
> other hand, something understandable but huge.
> ( and it's not specific to your patch Jean-Christophe, on imx6q.dtsi,
> it looks worse )
> I'm just trying to make sure that having a DTS like that :
> nand {
> 	pinctrl_nand: nand-0 {
> 		atmel,pins =
> 			<2 13 0x0 0x1   /* PC13 gpio RDY pin pull_up */
> 			2 14 0x0 0x1>; /* PC14 gpio enable pin pull_up */
> 	};
> };
> is better than :
> nand {
> 	pinctrl_nand: nand-0 {
> 		nand_rdy { atmel,bank = "C"; atmel,pin = <13>; atmel,mux = "GPIO";
> atmel,pull-up; };
> 		nand_ena { atmel,bank = "C"; atmel,pin = <14>; atmel,mux = "GPIO";
> atmel,pull-up; };
> 	};
> };
> It's what you did in 1st place on linux-at91 git, and I kinda liked it.
> But yeah, it's more verbose, and some lines will go beyond 80 columns,
> but that's already the case.
but as I explain you the DT must not have 1000s of not which we will have if
we do this. that's why I drop it

and soon we will have macro in DT so this will be more readable

Best Regards,
J.
diff mbox

Patch

diff --git a/arch/arm/boot/dts/at91sam9260.dtsi b/arch/arm/boot/dts/at91sam9260.dtsi
index 8ee7cd3..a4f4cba 100644
--- a/arch/arm/boot/dts/at91sam9260.dtsi
+++ b/arch/arm/boot/dts/at91sam9260.dtsi
@@ -208,6 +208,14 @@ 
 					};
 				};
 
+				nand {
+					pinctrl_nand: nand-0 {
+						atmel,pins =
+							<2 13 0x0 0x1	/* PC13 gpio RDY pin pull_up */
+							 2 14 0x0 0x1>;	/* PC14 gpio enable pin pull_up */
+					};
+				};
+
 				pioA: gpio@fffff400 {
 					compatible = "atmel,at91rm9200-gpio";
 					reg = <0xfffff400 0x200>;
@@ -370,6 +378,8 @@ 
 			      >;
 			atmel,nand-addr-offset = <21>;
 			atmel,nand-cmd-offset = <22>;
+			pinctrl-names = "default";
+			pinctrl-0 = <&pinctrl_nand>;
 			gpios = <&pioC 13 0
 				 &pioC 14 0
 				 0
diff --git a/arch/arm/boot/dts/at91sam9263.dtsi b/arch/arm/boot/dts/at91sam9263.dtsi
index 2d054c2..9314c32 100644
--- a/arch/arm/boot/dts/at91sam9263.dtsi
+++ b/arch/arm/boot/dts/at91sam9263.dtsi
@@ -155,6 +155,14 @@ 
 					};
 				};
 
+				nand {
+					pinctrl_nand: nand-0 {
+						atmel,pins =
+							<0 22 0x0 0x1	/* PA22 gpio RDY pin pull_up*/
+							 3 15 0x0 0x1>;	/* PD15 gpio enable pin pull_up */
+					};
+				};
+
 				pioA: gpio@fffff200 {
 					compatible = "atmel,at91rm9200-gpio";
 					reg = <0xfffff200 0x200>;
@@ -267,6 +275,8 @@ 
 			      >;
 			atmel,nand-addr-offset = <21>;
 			atmel,nand-cmd-offset = <22>;
+			pinctrl-names = "default";
+			pinctrl-0 = <&pinctrl_nand>;
 			gpios = <&pioA 22 0
 				 &pioD 15 0
 				 0
diff --git a/arch/arm/boot/dts/at91sam9g45.dtsi b/arch/arm/boot/dts/at91sam9g45.dtsi
index cfe197a..8863fd9 100644
--- a/arch/arm/boot/dts/at91sam9g45.dtsi
+++ b/arch/arm/boot/dts/at91sam9g45.dtsi
@@ -188,6 +188,14 @@ 
 					};
 				};
 
+				nand {
+					pinctrl_nand: nand-0 {
+						atmel,pins =
+							<2 8 0x0 0x1	/* PC8 gpio RDY pin pull_up*/
+							 2 14 0x0 0x1>;	/* PC14 gpio enable pin pull_up */
+					};
+				};
+
 				pioA: gpio@fffff200 {
 					compatible = "atmel,at91rm9200-gpio";
 					reg = <0xfffff200 0x200>;
@@ -341,6 +349,8 @@ 
 			      >;
 			atmel,nand-addr-offset = <21>;
 			atmel,nand-cmd-offset = <22>;
+			pinctrl-names = "default";
+			pinctrl-0 = <&pinctrl_nand>;
 			gpios = <&pioC 8 0
 				 &pioC 14 0
 				 0
diff --git a/arch/arm/boot/dts/at91sam9n12.dtsi b/arch/arm/boot/dts/at91sam9n12.dtsi
index 36a6ce0..d1f5655 100644
--- a/arch/arm/boot/dts/at91sam9n12.dtsi
+++ b/arch/arm/boot/dts/at91sam9n12.dtsi
@@ -190,6 +190,14 @@ 
 					};
 				};
 
+				nand {
+					pinctrl_nand: nand-0 {
+						atmel,pins =
+							<3 5 0x0 0x1	/* PD5 gpio RDY pin pull_up*/
+							 3 4 0x0 0x1>;	/* PD4 gpio enable pin pull_up */
+					};
+				};
+
 				pioA: gpio@fffff400 {
 					compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
 					reg = <0xfffff400 0x200>;
@@ -292,6 +300,8 @@ 
 			       >;
 			atmel,nand-addr-offset = <21>;
 			atmel,nand-cmd-offset = <22>;
+			pinctrl-names = "default";
+			pinctrl-0 = <&pinctrl_nand>;
 			gpios = <&pioD 5 0
 				 &pioD 4 0
 				 0
diff --git a/arch/arm/boot/dts/at91sam9x5.dtsi b/arch/arm/boot/dts/at91sam9x5.dtsi
index c585f04..e58965d6 100644
--- a/arch/arm/boot/dts/at91sam9x5.dtsi
+++ b/arch/arm/boot/dts/at91sam9x5.dtsi
@@ -204,6 +204,14 @@ 
 					};
 				};
 
+				nand {
+					pinctrl_nand: nand-0 {
+						atmel,pins =
+							<3 4 0x0 0x1	/* PD5 gpio RDY pin pull_up */
+							 3 5 0x0 0x1>;	/* PD4 gpio enable pin pull_up */
+					};
+				};
+
 				pioA: gpio@fffff400 {
 					compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
 					reg = <0xfffff400 0x200>;
@@ -346,6 +354,8 @@ 
 			      >;
 			atmel,nand-addr-offset = <21>;
 			atmel,nand-cmd-offset = <22>;
+			pinctrl-names = "default";
+			pinctrl-0 = <&pinctrl_nand>;
 			gpios = <&pioD 5 0
 				 &pioD 4 0
 				 0