From patchwork Wed Aug 15 23:43:33 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Mike Turquette X-Patchwork-Id: 1328991 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-process-083081@patchwork1.kernel.org Received: from merlin.infradead.org (merlin.infradead.org [205.233.59.134]) by patchwork1.kernel.org (Postfix) with ESMTP id D2D233FD8C for ; Wed, 15 Aug 2012 23:47:07 +0000 (UTC) Received: from localhost ([::1] helo=merlin.infradead.org) by merlin.infradead.org with esmtp (Exim 4.76 #1 (Red Hat Linux)) id 1T1nFy-0000oo-Vf; Wed, 15 Aug 2012 23:44:11 +0000 Received: from devils.ext.ti.com ([198.47.26.153]) by merlin.infradead.org with esmtps (Exim 4.76 #1 (Red Hat Linux)) id 1T1nFt-0000nO-OI for linux-arm-kernel@lists.infradead.org; Wed, 15 Aug 2012 23:44:07 +0000 Received: from dlelxv30.itg.ti.com ([172.17.2.17]) by devils.ext.ti.com (8.13.7/8.13.7) with ESMTP id q7FNi3nY023139; Wed, 15 Aug 2012 18:44:03 -0500 Received: from DLEE74.ent.ti.com (dlee74.ent.ti.com [157.170.170.8]) by dlelxv30.itg.ti.com (8.13.8/8.13.8) with ESMTP id q7FNi34S009732; Wed, 15 Aug 2012 18:44:03 -0500 Received: from dlelxv22.itg.ti.com (172.17.1.197) by DLEE74.ent.ti.com (157.170.170.8) with Microsoft SMTP Server id 14.1.323.3; Wed, 15 Aug 2012 18:44:02 -0500 Received: from nucleus.nsc.com (nucleus.nsc.com [10.188.36.112]) by dlelxv22.itg.ti.com (8.13.8/8.13.8) with ESMTP id q7FNhwV9026063; Wed, 15 Aug 2012 18:44:01 -0500 From: Mike Turquette To: Subject: [PATCH v2 3/4] [RFC] cpufreq: omap: scale regulator from clk notifier Date: Wed, 15 Aug 2012 16:43:33 -0700 Message-ID: <1345074214-17531-4-git-send-email-mturquette@linaro.org> X-Mailer: git-send-email 1.7.9.5 In-Reply-To: <1345074214-17531-1-git-send-email-mturquette@linaro.org> References: <1345074214-17531-1-git-send-email-mturquette@linaro.org> MIME-Version: 1.0 X-Spam-Note: CRM114 invocation failed X-Spam-Score: -6.9 (------) X-Spam-Report: SpamAssassin version 3.3.2 on merlin.infradead.org summary: Content analysis details: (-6.9 points) pts rule name description ---- ---------------------- -------------------------------------------------- -5.0 RCVD_IN_DNSWL_HI RBL: Sender listed at http://www.dnswl.org/, high trust [198.47.26.153 listed in list.dnswl.org] -1.9 BAYES_00 BODY: Bayes spam probability is 0 to 1% [score: 0.0000] Cc: paul@pwsan.com, pgaikwad@nvidia.com, Mike Turquette , viresh.kumar@linaro.org, linus.walleij@linaro.org, rnayak@ti.com, rob.herring@calxeda.com, ccross@android.com, myungjoo.ham@samsung.com, broonie@opensource.wolfsonmicro.com, rajagopal.venkat@linaro.org, shawn.guo@linaro.org, pdeschrijver@nvidia.com, linux-arm-kernel@lists.infradead.org X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: linux-arm-kernel-bounces@lists.infradead.org Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org This patch moves direct control of the MPU voltage regulator out of the cpufreq driver .target callback and instead uses the common dvfs clk rate-change notifier infrastructure. Ideally it would be nice to reduce the .target callback for omap's cpufreq driver to a simple call to clk_set_rate. For now there is still some other stuff needed there (jiffies per loop, rounding the rate, etc etc). Signed-off-by: Mike Turquette --- drivers/cpufreq/omap-cpufreq.c | 85 +++++++++++----------------------------- 1 file changed, 22 insertions(+), 63 deletions(-) diff --git a/drivers/cpufreq/omap-cpufreq.c b/drivers/cpufreq/omap-cpufreq.c index 17fa04d..2f7de30 100644 --- a/drivers/cpufreq/omap-cpufreq.c +++ b/drivers/cpufreq/omap-cpufreq.c @@ -55,7 +55,7 @@ static atomic_t freq_table_users = ATOMIC_INIT(0); static struct clk *mpu_clk; static char *mpu_clk_name; static struct device *mpu_dev; -static struct regulator *mpu_reg; +static struct dvfs_info *di; static int omap_verify_speed(struct cpufreq_policy *policy) { @@ -80,10 +80,9 @@ static int omap_target(struct cpufreq_policy *policy, unsigned int relation) { unsigned int i; - int r, ret = 0; + int ret = 0; struct cpufreq_freqs freqs; - struct opp *opp; - unsigned long freq, volt = 0, volt_old = 0, tol = 0; + unsigned long freq; if (!freq_table) { dev_err(mpu_dev, "%s: cpu%d: no freq table!\n", __func__, @@ -119,47 +118,11 @@ static int omap_target(struct cpufreq_policy *policy, freq = freqs.new * 1000; - if (mpu_reg) { - opp = opp_find_freq_ceil(mpu_dev, &freq); - if (IS_ERR(opp)) { - dev_err(mpu_dev, "%s: unable to find MPU OPP for %d\n", - __func__, freqs.new); - return -EINVAL; - } - volt = opp_get_voltage(opp); - tol = volt * OPP_TOLERANCE / 100; - volt_old = regulator_get_voltage(mpu_reg); - } - - dev_dbg(mpu_dev, "cpufreq-omap: %u MHz, %ld mV --> %u MHz, %ld mV\n", - freqs.old / 1000, volt_old ? volt_old / 1000 : -1, - freqs.new / 1000, volt ? volt / 1000 : -1); - - /* scaling up? scale voltage before frequency */ - if (mpu_reg && (freqs.new > freqs.old)) { - r = regulator_set_voltage(mpu_reg, volt - tol, volt + tol); - if (r < 0) { - dev_warn(mpu_dev, "%s: unable to scale voltage up.\n", - __func__); - freqs.new = freqs.old; - goto done; - } - } + dev_dbg(mpu_dev, "cpufreq-omap: %u MHz --> %u MHz\n", + freqs.old / 1000, freqs.new / 1000); ret = clk_set_rate(mpu_clk, freqs.new * 1000); - /* scaling down? scale voltage after frequency */ - if (mpu_reg && (freqs.new < freqs.old)) { - r = regulator_set_voltage(mpu_reg, volt - tol, volt + tol); - if (r < 0) { - dev_warn(mpu_dev, "%s: unable to scale voltage down.\n", - __func__); - ret = clk_set_rate(mpu_clk, freqs.old * 1000); - freqs.new = freqs.old; - goto done; - } - } - freqs.new = omap_getspeed(policy->cpu); #ifdef CONFIG_SMP /* @@ -187,7 +150,6 @@ static int omap_target(struct cpufreq_policy *policy, freqs.new); #endif -done: /* notifiers */ for_each_cpu(i, policy->cpus) { freqs.cpu = i; @@ -207,10 +169,6 @@ static int __cpuinit omap_cpu_init(struct cpufreq_policy *policy) { int result = 0; - mpu_clk = clk_get(NULL, mpu_clk_name); - if (IS_ERR(mpu_clk)) - return PTR_ERR(mpu_clk); - if (policy->cpu >= NR_CPUS) { result = -EINVAL; goto fail_ck; @@ -286,6 +244,8 @@ static struct cpufreq_driver omap_driver = { static int __init omap_cpufreq_init(void) { + struct dvfs_info_init dii; + if (cpu_is_omap24xx()) mpu_clk_name = "virt_prcm_set"; else if (cpu_is_omap34xx()) @@ -298,34 +258,33 @@ static int __init omap_cpufreq_init(void) return -EINVAL; } + mpu_clk = clk_get(NULL, mpu_clk_name); + if (IS_ERR(mpu_clk)) + return PTR_ERR(mpu_clk); + mpu_dev = omap_device_get_by_hwmod_name("mpu"); if (!mpu_dev) { pr_warning("%s: unable to get the mpu device\n", __func__); - return -EINVAL; + goto out; } - mpu_reg = regulator_get(mpu_dev, "vcc"); - if (IS_ERR(mpu_reg)) { - pr_warning("%s: unable to get MPU regulator\n", __func__); - mpu_reg = NULL; - } else { - /* - * Ensure physical regulator is present. - * (e.g. could be dummy regulator.) - */ - if (regulator_get_voltage(mpu_reg) < 0) { - pr_warn("%s: physical regulator not present for MPU\n", + dii.dev = mpu_dev; + dii.con_id = mpu_clk_name; + dii.reg_id = "vcc"; + dii.tol = OPP_TOLERANCE; + + di = dvfs_clk_notifier_register(&dii); + if (IS_ERR(di)) + pr_warning("%s: failed to register dvfs clk notifier\n", __func__); - regulator_put(mpu_reg); - mpu_reg = NULL; - } - } +out: return cpufreq_register_driver(&omap_driver); } static void __exit omap_cpufreq_exit(void) { + dvfs_clk_notifier_unregister(di); cpufreq_unregister_driver(&omap_driver); }