From patchwork Sat Aug 18 08:09:25 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Shawn Guo X-Patchwork-Id: 1340531 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-process-083081@patchwork1.kernel.org Received: from merlin.infradead.org (merlin.infradead.org [205.233.59.134]) by patchwork1.kernel.org (Postfix) with ESMTP id 02CF23FC71 for ; Sat, 18 Aug 2012 08:12:23 +0000 (UTC) Received: from localhost ([::1] helo=merlin.infradead.org) by merlin.infradead.org with esmtp (Exim 4.76 #1 (Red Hat Linux)) id 1T2e69-0002oW-4h; Sat, 18 Aug 2012 08:09:33 +0000 Received: from mail-pb0-f49.google.com ([209.85.160.49]) by merlin.infradead.org with esmtps (Exim 4.76 #1 (Red Hat Linux)) id 1T2e65-0002oI-7F for linux-arm-kernel@lists.infradead.org; Sat, 18 Aug 2012 08:09:29 +0000 Received: by pbbrq8 with SMTP id rq8so4798057pbb.36 for ; Sat, 18 Aug 2012 01:09:26 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20120113; h=from:to:cc:subject:date:message-id:x-mailer:x-gm-message-state; bh=pWByYJxkRn/LAyJxlokxnw7T1766ML6HDjgImewkkIU=; b=mx818IXwMXGLhAmXkGNRc45RVt9l//PPf1H9Q7eJKM+n4wUjJZOhOcanGHzLVUna4V oKqh03NL7QRGn6HWVeoP/bIr/7Y7fGnAqZ7PC0PeuhemGareZLFkH8Mlqf/Gcb2LzHe3 r+QXWUGYeworDR85WmT9eENW5Xw+FmnNbAqKqHqwADWDbTrAgJ99gXVCS/1WqdIltf7J 1gXRYJpm2OGgjlQ/TOfJCb+83zMYjT/qwBsO0uOqAH2pBRgamkNX8ooBMVIbDlanQRCu +9asZ17Yv+IP8Xp2pIpDjB2RqtLiQOzYi4wbk92B2EgFxWsH/ZqQIZj+chpPwQGmbEnt zxTw== Received: by 10.68.136.138 with SMTP id qa10mr17680793pbb.103.1345277366807; Sat, 18 Aug 2012 01:09:26 -0700 (PDT) Received: from localhost.localdomain ([221.225.141.189]) by mx.google.com with ESMTPS id qb6sm5694625pbb.18.2012.08.18.01.09.24 (version=TLSv1/SSLv3 cipher=OTHER); Sat, 18 Aug 2012 01:09:26 -0700 (PDT) From: Shawn Guo To: linux-arm-kernel@lists.infradead.org Subject: [PATCH] ARM: imx6: spin the cpu until hardware takes it down Date: Sat, 18 Aug 2012 16:09:25 +0800 Message-Id: <1345277365-30192-1-git-send-email-shawn.guo@linaro.org> X-Mailer: git-send-email 1.7.5.4 X-Gm-Message-State: ALoCoQkvYlBWGjJJgTNt9D86oRSr4MSTk1ceVdIf1dwyxOT/IAn5YJ4Ywvcu8RF6nR9JpfMdMSJd X-Spam-Note: CRM114 invocation failed X-Spam-Score: -2.6 (--) X-Spam-Report: SpamAssassin version 3.3.2 on merlin.infradead.org summary: Content analysis details: (-2.6 points) pts rule name description ---- ---------------------- -------------------------------------------------- -0.7 RCVD_IN_DNSWL_LOW RBL: Sender listed at http://www.dnswl.org/, low trust [209.85.160.49 listed in list.dnswl.org] -1.9 BAYES_00 BODY: Bayes spam probability is 0 to 1% [score: 0.0000] Cc: Shawn Guo , stable@vger.kernel.org X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: linux-arm-kernel-bounces@lists.infradead.org Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org Though commit 602bf40 (ARM: imx6: exit coherency when shutting down a cpu) improves the stability of imx6q cpu hotplug a lot, there are still hangs seen with a more stressful hotplug testing. It's expected that once imx_enable_cpu(cpu, false) is called, the cpu will be taken down by hardware immediately, and the code after that will not get any chance to execute. However, this is not always the case from the testing. The cpu could possibly be alive for a few cycles before hardware actually takes it down. So rather than letting cpu execute some code that could cause a hang in these cycles, let's make the cpu spin there and wait for hardware to take it down. Cc: Signed-off-by: Shawn Guo --- arch/arm/mach-imx/hotplug.c | 23 +++-------------------- 1 files changed, 3 insertions(+), 20 deletions(-) diff --git a/arch/arm/mach-imx/hotplug.c b/arch/arm/mach-imx/hotplug.c index 20ed2d5..f8f7437 100644 --- a/arch/arm/mach-imx/hotplug.c +++ b/arch/arm/mach-imx/hotplug.c @@ -42,22 +42,6 @@ static inline void cpu_enter_lowpower(void) : "cc"); } -static inline void cpu_leave_lowpower(void) -{ - unsigned int v; - - asm volatile( - "mrc p15, 0, %0, c1, c0, 0\n" - " orr %0, %0, %1\n" - " mcr p15, 0, %0, c1, c0, 0\n" - " mrc p15, 0, %0, c1, c0, 1\n" - " orr %0, %0, %2\n" - " mcr p15, 0, %0, c1, c0, 1\n" - : "=&r" (v) - : "Ir" (CR_C), "Ir" (0x40) - : "cc"); -} - /* * platform-specific code to shutdown a CPU * @@ -67,11 +51,10 @@ void platform_cpu_die(unsigned int cpu) { cpu_enter_lowpower(); imx_enable_cpu(cpu, false); - cpu_do_idle(); - cpu_leave_lowpower(); - /* We should never return from idle */ - panic("cpu %d unexpectedly exit from shutdown\n", cpu); + /* spin here until hardware takes it down */ + while (1) + ; } int platform_cpu_disable(unsigned int cpu)