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[3/3] ARM: SIRF: make sirf irqchip driver selectable since new SoCs will have GIC

Message ID 1345450787-17246-4-git-send-email-Barry.Song@csr.com (mailing list archive)
State New, archived
Headers show

Commit Message

Barry Song Aug. 20, 2012, 8:19 a.m. UTC 
From: Barry Song <Baohua.Song@csr.com>

New MARCO and POLO SoC uses GIC, so make irq.c selectable and select
it for PRIMAII

Signed-off-by: Barry Song <Baohua.Song@csr.com>
---
 arch/arm/mach-sirf/Kconfig  |    4 ++++
 arch/arm/mach-sirf/Makefile |    2 +-
 2 files changed, 5 insertions(+), 1 deletions(-)
diff mbox

Patch

diff --git a/arch/arm/mach-sirf/Kconfig b/arch/arm/mach-sirf/Kconfig
index 811e782..fea4bd9 100644
--- a/arch/arm/mach-sirf/Kconfig
+++ b/arch/arm/mach-sirf/Kconfig
@@ -8,9 +8,13 @@  config ARCH_PRIMA2
 	bool "CSR SiRFSoC PRIMA2 ARM Cortex A9 Platform"
 	select CPU_V7
 	select ZONE_DMA
+	select SIRF_IRQ
 	help
           Support for CSR SiRFSoC ARM Cortex A9 Platform
 
 endchoice
 
+config SIRF_IRQ
+	bool
+
 endif
diff --git a/arch/arm/mach-sirf/Makefile b/arch/arm/mach-sirf/Makefile
index 852af49..3103fdf 100644
--- a/arch/arm/mach-sirf/Makefile
+++ b/arch/arm/mach-sirf/Makefile
@@ -1,8 +1,8 @@ 
 obj-y := timer.o
-obj-y += irq.o
 obj-y += rstc.o
 obj-y += board-generic.o
 obj-y += rtciobrg.o
 obj-$(CONFIG_DEBUG_LL) += lluart.o
 obj-$(CONFIG_CACHE_L2X0) += l2x0.o
 obj-$(CONFIG_SUSPEND) += pm.o sleep.o
+obj-$(CONFIG_SIRF_IRQ) += irq.o